24#ifndef TQM8xx_IRQ_IRQ_H
25#define TQM8xx_IRQ_IRQ_H
41#define BSP_SIU_PER_IRQ_NUMBER 16
42#define BSP_SIU_IRQ_LOWEST_OFFSET 0
43#define BSP_SIU_IRQ_MAX_OFFSET (BSP_SIU_IRQ_LOWEST_OFFSET\
44 +BSP_SIU_PER_IRQ_NUMBER-1)
46#define BSP_IS_SIU_IRQ(irqnum) \
47 (((irqnum) >= BSP_SIU_IRQ_LOWEST_OFFSET) && \
48 ((irqnum) <= BSP_SIU_IRQ_MAX_OFFSET))
50#define BSP_CPM_PER_IRQ_NUMBER 32
51#define BSP_CPM_IRQ_LOWEST_OFFSET (BSP_SIU_IRQ_MAX_OFFSET+1)
52#define BSP_CPM_IRQ_MAX_OFFSET (BSP_CPM_IRQ_LOWEST_OFFSET\
53 +BSP_CPM_PER_IRQ_NUMBER-1)
55#define BSP_IS_CPM_IRQ(irqnum) \
56 (((irqnum) >= BSP_CPM_IRQ_LOWEST_OFFSET) && \
57 ((irqnum) <= BSP_CPM_IRQ_MAX_OFFSET))
61#define BSP_PROCESSOR_IRQ_NUMBER 1
62#define BSP_PROCESSOR_IRQ_LOWEST_OFFSET (BSP_CPM_IRQ_MAX_OFFSET+1)
63#define BSP_PROCESSOR_IRQ_MAX_OFFSET (BSP_PROCESSOR_IRQ_LOWEST_OFFSET\
64 +BSP_PROCESSOR_IRQ_NUMBER-1)
66#define BSP_IS_PROCESSOR_IRQ(irqnum) \
67 (((irqnum) >= BSP_PROCESSOR_IRQ_LOWEST_OFFSET) && \
68 ((irqnum) <= BSP_PROCESSOR_IRQ_MAX_OFFSET))
72#define BSP_IRQ_NUMBER (BSP_PROCESSOR_IRQ_MAX_OFFSET+1)
73#define BSP_LOWEST_OFFSET BSP_SIU_IRQ_LOWEST_OFFSET
74#define BSP_MAX_OFFSET BSP_PROCESSOR_IRQ_MAX_OFFSET
76#define BSP_IS_VALID_IRQ(irqnum) \
77 (BSP_IS_PROCESSOR_IRQ(irqnum) \
78 || BSP_IS_SIU_IRQ(irqnum) \
79 || BSP_IS_CPM_IRQ(irqnum))
90 BSP_SIU_EXT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 0,
91 BSP_SIU_INT_IRQ_0 = BSP_SIU_IRQ_LOWEST_OFFSET + 1,
92 BSP_SIU_EXT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 2,
93 BSP_SIU_INT_IRQ_1 = BSP_SIU_IRQ_LOWEST_OFFSET + 3,
94 BSP_SIU_EXT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 4,
95 BSP_SIU_INT_IRQ_2 = BSP_SIU_IRQ_LOWEST_OFFSET + 5,
96 BSP_SIU_EXT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 6,
97 BSP_SIU_INT_IRQ_3 = BSP_SIU_IRQ_LOWEST_OFFSET + 7,
98 BSP_SIU_EXT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 8,
99 BSP_SIU_INT_IRQ_4 = BSP_SIU_IRQ_LOWEST_OFFSET + 9,
100 BSP_SIU_EXT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 10,
101 BSP_SIU_INT_IRQ_5 = BSP_SIU_IRQ_LOWEST_OFFSET + 11,
102 BSP_SIU_EXT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 12,
103 BSP_SIU_INT_IRQ_6 = BSP_SIU_IRQ_LOWEST_OFFSET + 13,
104 BSP_SIU_EXT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 14,
105 BSP_SIU_INT_IRQ_7 = BSP_SIU_IRQ_LOWEST_OFFSET + 15,
106 BSP_SIU_IRQ_LAST = BSP_SIU_IRQ_MAX_OFFSET,
110 BSP_CPM_IRQ_ERROR = (BSP_CPM_IRQ_LOWEST_OFFSET),
111 BSP_CPM_IRQ_PARALLEL_IO_PC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 1),
112 BSP_CPM_IRQ_PARALLEL_IO_PC5 = (BSP_CPM_IRQ_LOWEST_OFFSET + 2),
113 BSP_CPM_IRQ_SMC2_OR_PIP = (BSP_CPM_IRQ_LOWEST_OFFSET + 3),
114 BSP_CPM_IRQ_SMC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 4),
115 BSP_CPM_IRQ_SPI = (BSP_CPM_IRQ_LOWEST_OFFSET + 5),
116 BSP_CPM_IRQ_PARALLEL_IO_PC6 = (BSP_CPM_IRQ_LOWEST_OFFSET + 6),
117 BSP_CPM_IRQ_TIMER_4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 7),
118 BSP_CPM_IRQ_PARALLEL_IO_PC7 = (BSP_CPM_IRQ_LOWEST_OFFSET + 9),
119 BSP_CPM_IRQ_PARALLEL_IO_PC8 = (BSP_CPM_IRQ_LOWEST_OFFSET + 10),
120 BSP_CPM_IRQ_PARALLEL_IO_PC9 = (BSP_CPM_IRQ_LOWEST_OFFSET + 11),
121 BSP_CPM_IRQ_TIMER_3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 12),
122 BSP_CPM_IRQ_PARALLEL_IO_PC10= (BSP_CPM_IRQ_LOWEST_OFFSET + 14),
123 BSP_CPM_IRQ_PARALLEL_IO_PC11= (BSP_CPM_IRQ_LOWEST_OFFSET + 15),
124 BSP_CPM_I2C = (BSP_CPM_IRQ_LOWEST_OFFSET + 16),
125 BSP_CPM_RISC_TIMER_TABLE = (BSP_CPM_IRQ_LOWEST_OFFSET + 17),
126 BSP_CPM_IRQ_TIMER_2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 18),
127 BSP_CPM_IDMA2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 20),
128 BSP_CPM_IDMA1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 21),
129 BSP_CPM_SDMA_CHANNEL_BUS_ERR= (BSP_CPM_IRQ_LOWEST_OFFSET + 22),
130 BSP_CPM_IRQ_PARALLEL_IO_PC12= (BSP_CPM_IRQ_LOWEST_OFFSET + 23),
131 BSP_CPM_IRQ_PARALLEL_IO_PC13= (BSP_CPM_IRQ_LOWEST_OFFSET + 24),
132 BSP_CPM_IRQ_TIMER_1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 25),
133 BSP_CPM_IRQ_PARALLEL_IO_PC14= (BSP_CPM_IRQ_LOWEST_OFFSET + 26),
134 BSP_CPM_IRQ_SCC4 = (BSP_CPM_IRQ_LOWEST_OFFSET + 27),
135 BSP_CPM_IRQ_SCC3 = (BSP_CPM_IRQ_LOWEST_OFFSET + 28),
136 BSP_CPM_IRQ_SCC2 = (BSP_CPM_IRQ_LOWEST_OFFSET + 29),
137 BSP_CPM_IRQ_SCC1 = (BSP_CPM_IRQ_LOWEST_OFFSET + 30),
138 BSP_CPM_IRQ_PARALLEL_IO_PC15= (BSP_CPM_IRQ_LOWEST_OFFSET + 31),
139 BSP_CPM_IRQ_LAST = BSP_CPM_IRQ_MAX_OFFSET,
140 } rtems_irq_symbolic_name;
145#define BSP_CPM_INTERRUPT BSP_SIU_INT_IRQ_2
146#define BSP_PERIODIC_TIMER BSP_SIU_INT_IRQ_6
147#define BSP_FAST_ETHERNET_CTRL BSP_SIU_INT_IRQ_3
149#define BSP_INTERRUPT_VECTOR_MIN BSP_LOWEST_OFFSET
151#define BSP_INTERRUPT_VECTOR_MAX BSP_MAX_OFFSET
153extern int BSP_irq_enabled_at_cpm(
const rtems_irq_number irqLine);
Header file for the Interrupt Manager Extension.