18#ifndef LIBBSP_MIPS_JMR3904_IRQ_H
19#define LIBBSP_MIPS_JMR3904_IRQ_H
34#define BSP_INTERRUPT_VECTOR_MIN 0
43 #define TX3904_IRQ_INT1 MIPS_INTERRUPT_BASE+0
44 #define TX3904_IRQ_INT2 MIPS_INTERRUPT_BASE+1
45 #define TX3904_IRQ_INT3 MIPS_INTERRUPT_BASE+2
46 #define TX3904_IRQ_INT4 MIPS_INTERRUPT_BASE+3
47 #define TX3904_IRQ_INT5 MIPS_INTERRUPT_BASE+4
48 #define TX3904_IRQ_INT6 MIPS_INTERRUPT_BASE+5
49 #define TX3904_IRQ_INT7 MIPS_INTERRUPT_BASE+6
50 #define TX3904_IRQ_DMAC3 MIPS_INTERRUPT_BASE+7
51 #define TX3904_IRQ_DMAC2 MIPS_INTERRUPT_BASE+8
52 #define TX3904_IRQ_DMAC1 MIPS_INTERRUPT_BASE+9
53 #define TX3904_IRQ_DMAC0 MIPS_INTERRUPT_BASE+10
54 #define TX3904_IRQ_SIO0 MIPS_INTERRUPT_BASE+11
55 #define TX3904_IRQ_SIO1 MIPS_INTERRUPT_BASE+12
56 #define TX3904_IRQ_TMR0 MIPS_INTERRUPT_BASE+13
57 #define TX3904_IRQ_TMR1 MIPS_INTERRUPT_BASE+14
58 #define TX3904_IRQ_TMR2 MIPS_INTERRUPT_BASE+15
59 #define TX3904_IRQ_INT0 MIPS_INTERRUPT_BASE+16
60 #define TX3904_IRQ_SOFTWARE_1 MIPS_INTERRUPT_BASE+17
61 #define TX3904_IRQ_SOFTWARE_2 MIPS_INTERRUPT_BASE+18
62 #define TX3904_MAXIMUM_VECTORS MIPS_INTERRUPT_BASE+19
64#define BSP_INTERRUPT_VECTOR_MAX TX3904_MAXIMUM_VECTORS
Header file for the Interrupt Manager Extension.
Information to build RTEMS for a "no cpu" while in protected mode.