23#ifndef LIBBSP_ARM_LPC32XX_BSP_H
24#define LIBBSP_ARM_LPC32XX_BSP_H
38#define BSP_FEATURE_IRQ_EXTENSION
51struct rtems_bsdnet_ifconfig;
57 struct rtems_bsdnet_ifconfig *
config,
64#define RTEMS_BSP_NETWORK_DRIVER_ATTACH lpc_eth_attach_detach
69#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
93#define LPC32XX_STANDARD_TIMER (&lpc32xx.timer_1)
95static inline unsigned lpc32xx_timer(
void)
97 volatile lpc_timer *timer = LPC32XX_STANDARD_TIMER;
102static inline void lpc32xx_micro_seconds_delay(
unsigned us)
104 unsigned start = lpc32xx_timer();
105 unsigned delay = us * (LPC32XX_PERIPH_CLK / 1000000);
106 unsigned elapsed = 0;
109 elapsed = lpc32xx_timer() - start;
110 }
while (elapsed < delay);
113#if LPC32XX_OSCILLATOR_MAIN == 13000000U
114 #define LPC32XX_HCLKPLL_CTRL_INIT_VALUE \
115 (HCLK_PLL_POWER | HCLK_PLL_DIRECT | HCLK_PLL_M(16 - 1))
116 #define LPC32XX_HCLKDIV_CTRL_INIT_VALUE \
117 (HCLK_DIV_HCLK(2 - 1) | HCLK_DIV_PERIPH_CLK(16 - 1) | HCLK_DIV_DDRAM_CLK(0))
119 #error "unexpected main oscillator frequency"
122bool lpc32xx_start_pll_setup(
123 uint32_t hclkpll_ctrl,
124 uint32_t hclkdiv_ctrl,
128uint32_t lpc32xx_sysclk(
void);
130uint32_t lpc32xx_hclkpll_clk(
void);
132uint32_t lpc32xx_periph_clk(
void);
134uint32_t lpc32xx_hclk(
void);
136uint32_t lpc32xx_arm_clk(
void);
138uint32_t lpc32xx_ddram_clk(
void);
141 LPC32XX_NAND_CONTROLLER_NONE,
142 LPC32XX_NAND_CONTROLLER_MLC,
143 LPC32XX_NAND_CONTROLLER_SLC
144} lpc32xx_nand_controller;
146void lpc32xx_select_nand_controller(lpc32xx_nand_controller nand_controller);
152#define BSP_IDLE_TASK_BODY bsp_idle_thread
154#define BSP_CONSOLE_UART_BASE LPC32XX_BASE_UART_5
177#ifdef LPC32XX_SCRATCH_AREA_SIZE
183 extern uint8_t lpc32xx_scratch_area [LPC32XX_SCRATCH_AREA_SIZE]
187#define LPC32XX_DO_STOP_GPDMA \
189 if ((LPC32XX_DMACLK_CTRL & 0x1) != 0) { \
190 if ((lpc32xx.dma.cfg & DMA_CFG_E) != 0) { \
192 for (i = 0; i < 8; ++i) { \
193 lpc32xx.dma.channels [i].cfg = 0; \
195 lpc32xx.dma.cfg &= ~DMA_CFG_E; \
197 LPC32XX_DMACLK_CTRL = 0; \
201#define LPC32XX_DO_STOP_ETHERNET \
203 if ((LPC32XX_MAC_CLK_CTRL & 0x7) == 0x7) { \
204 lpc32xx.eth.command = 0x38; \
205 lpc32xx.eth.mac1 = 0xcf00; \
206 lpc32xx.eth.mac1 = 0; \
207 LPC32XX_MAC_CLK_CTRL = 0; \
211#define LPC32XX_DO_STOP_USB \
213 if ((LPC32XX_USB_CTRL & 0x010e8000) != 0) { \
214 LPC32XX_OTG_CLK_CTRL = 0; \
215 LPC32XX_USB_CTRL = 0x80000; \
219#define LPC32XX_DO_RESTART(addr) \
221 ARM_SWITCH_REGISTERS; \
222 rtems_interrupt_level level; \
225 rtems_interrupt_disable(level); \
228 arm_cp15_data_cache_test_and_clean(); \
229 arm_cp15_instruction_cache_invalidate(); \
231 ctrl = arm_cp15_get_control(); \
232 ctrl &= ~(ARM_CP15_CTRL_I | ARM_CP15_CTRL_C | ARM_CP15_CTRL_M); \
233 arm_cp15_set_control(ctrl); \
237 "mov pc, %[addr]\n" \
239 : ARM_SWITCH_OUTPUT \
240 : [addr] "r" (addr) \
DEFAULT_INITIAL_EXTENSION Support.
unsigned short int uint16 __attribute__((__may_alias__))
Disable IRQ Interrupts.
Definition: mcf5282.h:37
void bsp_restart(const void *addr)
Restarts the bsp with "addr" address.
Definition: restart.c:25
void * bsp_idle_thread(uintptr_t ignored)
Optimized idle task.
Definition: bspidle.c:26
int lpc_eth_attach_detach(struct rtems_bsdnet_ifconfig *config, int attaching)
Network driver attach and detach function.
Definition: lpc-ethernet.c:1827
uint32_t lpc32xx_magic_zero_begin[]
Begin of magic zero area.
void * lpc32xx_idle(uintptr_t ignored)
Optimized idle task.
uint32_t lpc32xx_magic_zero_end[]
End of magic zero area.
uint32_t lpc32xx_magic_zero_size[]
Size of magic zero area.
Definition: deflate.c:115
Timer control block.
Definition: lpc-timer.h:133