RTEMS 5.2
wd80x3.h
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1
7/*
8 * Information about the DP8390 Ethernet controller.
9 */
10
11#ifndef __BSP_WD80x3_h
12#define __BSP_WD80x3_h
13
14/* Register descriptions */
15
29#define DATAPORT 0x10
31#define RESET 0x1f
33#define W83CREG 0x00
34#define ADDROM 0x08
35
43#define CMDR 0x00+RO
45#define CLDA0 0x01+RO
47#define CLDA1 0x02+RO
49#define BNRY 0x03+RO
51#define TSR 0x04+RO
53#define NCR 0x05+RO
55#define FIFO 0x06+RO
57#define ISR 0x07+RO
59#define CRDA0 0x08+RO
61#define CRDA1 0x09+RO
63#define RSR 0x0C+RO
65#define CNTR0 0x0D+RO
67#define CNTR1 RO+0x0E
69#define CNTR2 0x0F+RO
70
79#define PSTART 0x01+RO
81#define PSTOP 0x02+RO
83#define TPSR 0x04+RO
85#define TBCR0 0x05+RO
87#define TBCR1 0x06+RO
89#define RSAR0 0x08+RO
91#define RSAR1 0x09+RO
93#define RBCR0 0x0A+RO
95#define RBCR1 0x0B+RO
97#define RCR 0x0C+RO
99#define TCR 0x0D+RO
101#define DCR RO+0x0E
103#define IMR 0x0F+RO
104
113#define PAR 0x01+RO
115#define CURR 0x07+RO
117#define MAR 0x08+RO
119#define MARsize 8
120
129#define MSK_RESET 0x80
130#define MSK_ENASH 0x40
132#define MSK_DECOD 0x3F
133
142#define MSK_STP 0x01
144#define MSK_STA 0x02
146#define MSK_TXP 0x04
148#define MSK_RRE 0x08
150#define MSK_RWR 0x10
152#define MSK_RD2 0x20
154#define MSK_PG0 0x00
156#define MSK_PG1 0x40
158#define MSK_PG2 0x80
159
167/* @brief rx with no error */
168#define MSK_PRX 0x01
169/* @brief tx with no error */
170#define MSK_PTX 0x02
171/* @brief rx with error */
172#define MSK_RXE 0x04
173/* @brief tx with error */
174#define MSK_TXE 0x08
175/* @brief overwrite warning */
176#define MSK_OVW 0x10
177/* @brief MSB of one of the tally counters is set */
178#define MSK_CNT 0x20
179/* @brief remote dma completed */
180#define MSK_RDC 0x40
181/* @brief reset state indicator */
182#define MSK_RST 0x80
183
192#define MSK_WTS 0x01
194#define MSK_BOS 0x02
196#define MSK_LAS 0x04
198#define MSK_BMS 0x08
200#define MSK_ARM 0x10
202#define MSK_FT00 0x00
204#define MSK_FT01 0x20
206#define MSK_FT10 0x40
208#define MSK_FT11 0x60
209
218#define MSK_SEP 0x01
220#define MSK_AR 0x02
222#define MSK_AB 0x04
224#define MSK_AM 0x08
226#define MSK_PRO 0x10
228#define MSK_MON 0x20
229
238#define MSK_CRC 0x01
240#define MSK_LOOP 0x02
242#define MSK_BCST 0x04
244#define MSK_LB01 0x06
246#define MSK_ATD 0x08
248#define MSK_OFST 0x10
249
258#define SMK_PRX 0x01
260#define SMK_CRC 0x02
262#define SMK_FAE 0x04
264#define SMK_FO 0x08
266#define SMK_MPA 0x10
268#define SMK_PHY 0x20
270#define SMK_DIS 0x40
272#define SMK_DEF 0x80
273
282#define SMK_PTX 0x01
284#define SMK_DFR 0x02
286#define SMK_COL 0x04
288#define SMK_ABT 0x08
290#define SMK_CRS 0x10
292#define SMK_FU 0x20
294#define SMK_CDH 0x40
296#define SMK_OWC 0x80
297
302#endif
303/* end of include */