| 
| 
unsigned char  | PrintableModel [32] | 
|   | 
| 
unsigned char  | Serial [16] | 
|   | 
| 
unsigned char  | Reserved [48] | 
|   | 
| 
unsigned long  | FirmwareSupplier | 
|   | 
| 
unsigned long  | FirmwareSupports | 
|   | 
| 
unsigned long  | NvramSize | 
|   | 
| 
unsigned long  | NumSIMMSlots | 
|   | 
| 
unsigned short  | EndianSwitchMethod | 
|   | 
| 
unsigned short  | SpreadIOMethod | 
|   | 
| 
unsigned long  | SmpIar | 
|   | 
| 
unsigned long  | RAMErrLogOffset | 
|   | 
| 
unsigned long  | Reserved5 | 
|   | 
| 
unsigned long  | Reserved6 | 
|   | 
| 
unsigned long  | ProcessorHz | 
|   | 
| 
unsigned long  | ProcessorBusHz | 
|   | 
| 
unsigned long  | Reserved7 | 
|   | 
| 
unsigned long  | TimeBaseDivisor | 
|   | 
| 
unsigned long  | WordWidth | 
|   | 
| 
unsigned long  | PageSize | 
|   | 
| 
unsigned long  | CoherenceBlockSize | 
|   | 
| 
unsigned long  | GranuleSize | 
|   | 
| 
unsigned long  | CacheSize | 
|   | 
| 
unsigned long  | CacheAttrib | 
|   | 
| 
unsigned long  | CacheAssoc | 
|   | 
| 
unsigned long  | CacheLineSize | 
|   | 
| 
unsigned long  | I_CacheSize | 
|   | 
| 
unsigned long  | I_CacheAssoc | 
|   | 
| 
unsigned long  | I_CacheLineSize | 
|   | 
| 
unsigned long  | D_CacheSize | 
|   | 
| 
unsigned long  | D_CacheAssoc | 
|   | 
| 
unsigned long  | D_CacheLineSize | 
|   | 
| 
unsigned long  | TLBSize | 
|   | 
| 
unsigned long  | TLBAttrib | 
|   | 
| 
unsigned long  | TLBAssoc | 
|   | 
| 
unsigned long  | I_TLBSize | 
|   | 
| 
unsigned long  | I_TLBAssoc | 
|   | 
| 
unsigned long  | D_TLBSize | 
|   | 
| 
unsigned long  | D_TLBAssoc | 
|   | 
| 
unsigned long  | ExtendedVPD | 
|   | 
The documentation for this struct was generated from the following file: