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#define  | QORIQ_FILL(a,  b,  s)   uint8_t reserved_ ## b [b - a - sizeof(s)] | 
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#define  | QORIQ_RESERVE(a,  b)   uint8_t reserved_ ## b [b - a] | 
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#define  | GTCCR_TOG   BSP_BBIT32(0) | 
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#define  | GTCCR_COUNT_GET(reg)   BSP_BFLD32GET(reg, 1, 31) | 
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#define  | GTBCR_CI   BSP_BBIT32(0) | 
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#define  | GTBCR_COUNT(val)   BSP_BFLD32(val, 1, 31) | 
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#define  | GTBCR_COUNT_GET(reg)   BSP_BFLD32GET(reg, 1, 31) | 
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#define  | GTBCR_COUNT_SET(reg,  val)   BSP_BFLD32SET(reg, val, 1, 31) | 
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#define  | GTTCR_ROVR(val)   BSP_BFLD32(val, 5, 7) | 
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#define  | GTTCR_ROVR_GET(reg)   BSP_BFLD32GET(reg, 5, 7) | 
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#define  | GTTCR_ROVR_SET(reg,  val)   BSP_BFLD32SET(reg, val, 5, 7) | 
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#define  | GTTCR_RTM   BSP_BBIT32(15) | 
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#define  | GTTCR_CLKR(val)   BSP_BFLD32(val, 22, 23) | 
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#define  | GTTCR_CLKR_GET(reg)   BSP_BFLD32GET(reg, 22, 23) | 
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#define  | GTTCR_CLKR_SET(reg,  val)   BSP_BFLD32SET(reg, val, 22, 23) | 
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#define  | GTTCR_CASC(val)   BSP_BFLD32(val, 29, 31) | 
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#define  | GTTCR_CASC_GET(reg)   BSP_BFLD32GET(reg, 29, 31) | 
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#define  | GTTCR_CASC_SET(reg,  val)   BSP_BFLD32SET(reg, val, 29, 31) | 
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#define  | CCSRBAR_BASE_ADDR(val)   BSP_BFLD32(val, 8, 23) | 
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#define  | CCSRBAR_BASE_ADDR_GET(reg)   BSP_BFLD32GET(reg, 8, 23) | 
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#define  | CCSRBAR_BASE_ADDR_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 23) | 
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#define  | ALTCBAR_BASE_ADDR(val)   BSP_BFLD32(val, 8, 23) | 
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#define  | ALTCBAR_BASE_ADDR_GET(reg)   BSP_BFLD32GET(reg, 8, 23) | 
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#define  | ALTCBAR_BASE_ADDR_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 23) | 
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#define  | ALTCAR_EN   BSP_BBIT32(0) | 
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#define  | ALTCAR_TRGT_ID(val)   BSP_BFLD32(val, 8, 11) | 
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#define  | ALTCAR_TRGT_ID_GET(reg)   BSP_BFLD32GET(reg, 8, 11) | 
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#define  | ALTCAR_TRGT_ID_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 11) | 
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#define  | BPTR_EN   BSP_BBIT32(0) | 
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#define  | BPTR_BOOT_PAGE(val)   BSP_BFLD32(val, 8, 31) | 
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#define  | BPTR_BOOT_PAGE_GET(reg)   BSP_BFLD32GET(reg, 8, 31) | 
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#define  | BPTR_BOOT_PAGE_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 31) | 
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#define  | LAWBAR_BASE_ADDR(val)   BSP_BFLD32(val, 8, 31) | 
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#define  | LAWBAR_BASE_ADDR_GET(reg)   BSP_BFLD32GET(reg, 8, 31) | 
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#define  | LAWBAR_BASE_ADDR_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 31) | 
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#define  | LAWAR_EN   BSP_BBIT32(0) | 
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#define  | LAWAR_TRGT(val)   BSP_BFLD32(val, 8, 11) | 
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#define  | LAWAR_TRGT_GET(reg)   BSP_BFLD32GET(reg, 8, 11) | 
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#define  | LAWAR_TRGT_SET(reg,  val)   BSP_BFLD32SET(reg, val, 8, 11) | 
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#define  | LAWAR_SIZE(val)   BSP_BFLD32(val, 26, 31) | 
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#define  | LAWAR_SIZE_GET(reg)   BSP_BFLD32GET(reg, 26, 31) | 
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#define  | LAWAR_SIZE_SET(reg,  val)   BSP_BFLD32SET(reg, val, 26, 31) | 
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QorIQ Configuration, Control and Status Registers.