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#define  | HSMCI   ((Hsmci  *)0x40000000U) | 
|   | (HSMCI ) Base Address 
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#define  | SSC   ((Ssc    *)0x40004000U) | 
|   | (SSC ) Base Address 
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#define  | SPI0   ((Spi    *)0x40008000U) | 
|   | (SPI0 ) Base Address 
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#define  | TC0   ((Tc     *)0x4000C000U) | 
|   | (TC0 ) Base Address 
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#define  | TC1   ((Tc     *)0x40010000U) | 
|   | (TC1 ) Base Address 
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#define  | TC2   ((Tc     *)0x40014000U) | 
|   | (TC2 ) Base Address 
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#define  | TWIHS0   ((Twihs  *)0x40018000U) | 
|   | (TWIHS0) Base Address 
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#define  | TWIHS1   ((Twihs  *)0x4001C000U) | 
|   | (TWIHS1) Base Address 
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#define  | PWM0   ((Pwm    *)0x40020000U) | 
|   | (PWM0 ) Base Address 
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#define  | USART0   ((Usart  *)0x40024000U) | 
|   | (USART0) Base Address 
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#define  | USART1   ((Usart  *)0x40028000U) | 
|   | (USART1) Base Address 
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#define  | USART2   ((Usart  *)0x4002C000U) | 
|   | (USART2) Base Address 
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#define  | MCAN0   ((Mcan   *)0x40030000U) | 
|   | (MCAN0 ) Base Address 
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#define  | MCAN1   ((Mcan   *)0x40034000U) | 
|   | (MCAN1 ) Base Address 
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#define  | USBHS   ((Usbhs  *)0x40038000U) | 
|   | (USBHS ) Base Address 
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#define  | AFEC0   ((Afec   *)0x4003C000U) | 
|   | (AFEC0 ) Base Address 
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#define  | DACC   ((Dacc   *)0x40040000U) | 
|   | (DACC ) Base Address 
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#define  | ACC   ((Acc    *)0x40044000U) | 
|   | (ACC ) Base Address 
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#define  | ICM   ((Icm    *)0x40048000U) | 
|   | (ICM ) Base Address 
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#define  | ISI   ((Isi    *)0x4004C000U) | 
|   | (ISI ) Base Address 
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#define  | GMAC   ((Gmac   *)0x40050000U) | 
|   | (GMAC ) Base Address 
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#define  | TC3   ((Tc     *)0x40054000U) | 
|   | (TC3 ) Base Address 
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#define  | SPI1   ((Spi    *)0x40058000U) | 
|   | (SPI1 ) Base Address 
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#define  | PWM1   ((Pwm    *)0x4005C000U) | 
|   | (PWM1 ) Base Address 
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#define  | TWIHS2   ((Twihs  *)0x40060000U) | 
|   | (TWIHS2) Base Address 
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#define  | AFEC1   ((Afec   *)0x40064000U) | 
|   | (AFEC1 ) Base Address 
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#define  | MLB   ((Mlb    *)0x40068000U) | 
|   | (MLB ) Base Address 
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#define  | AES   ((Aes    *)0x4006C000U) | 
|   | (AES ) Base Address 
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#define  | TRNG   ((Trng   *)0x40070000U) | 
|   | (TRNG ) Base Address 
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#define  | XDMAC   ((Xdmac  *)0x40078000U) | 
|   | (XDMAC ) Base Address 
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#define  | QSPI   ((Qspi   *)0x4007C000U) | 
|   | (QSPI ) Base Address 
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#define  | SMC   ((Smc    *)0x40080000U) | 
|   | (SMC ) Base Address 
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#define  | SDRAMC   ((Sdramc *)0x40084000U) | 
|   | (SDRAMC) Base Address 
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#define  | MATRIX   ((Matrix *)0x40088000U) | 
|   | (MATRIX) Base Address 
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#define  | UTMI   ((Utmi   *)0x400E0400U) | 
|   | (UTMI ) Base Address 
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#define  | PMC   ((Pmc    *)0x400E0600U) | 
|   | (PMC ) Base Address 
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#define  | UART0   ((Uart   *)0x400E0800U) | 
|   | (UART0 ) Base Address 
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#define  | CHIPID   ((Chipid *)0x400E0940U) | 
|   | (CHIPID) Base Address 
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#define  | UART1   ((Uart   *)0x400E0A00U) | 
|   | (UART1 ) Base Address 
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#define  | EFC   ((Efc    *)0x400E0C00U) | 
|   | (EFC ) Base Address 
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#define  | PIOA   ((Pio    *)0x400E0E00U) | 
|   | (PIOA ) Base Address 
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#define  | PIOB   ((Pio    *)0x400E1000U) | 
|   | (PIOB ) Base Address 
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#define  | PIOC   ((Pio    *)0x400E1200U) | 
|   | (PIOC ) Base Address 
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#define  | PIOD   ((Pio    *)0x400E1400U) | 
|   | (PIOD ) Base Address 
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#define  | PIOE   ((Pio    *)0x400E1600U) | 
|   | (PIOE ) Base Address 
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#define  | RSTC   ((Rstc   *)0x400E1800U) | 
|   | (RSTC ) Base Address 
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#define  | SUPC   ((Supc   *)0x400E1810U) | 
|   | (SUPC ) Base Address 
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#define  | RTT   ((Rtt    *)0x400E1830U) | 
|   | (RTT ) Base Address 
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#define  | WDT   ((Wdt    *)0x400E1850U) | 
|   | (WDT ) Base Address 
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#define  | RTC   ((Rtc    *)0x400E1860U) | 
|   | (RTC ) Base Address 
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#define  | GPBR   ((Gpbr   *)0x400E1890U) | 
|   | (GPBR ) Base Address 
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#define  | RSWDT   ((Rswdt  *)0x400E1900U) | 
|   | (RSWDT ) Base Address 
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#define  | UART2   ((Uart   *)0x400E1A00U) | 
|   | (UART2 ) Base Address 
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#define  | UART3   ((Uart   *)0x400E1C00U) | 
|   | (UART3 ) Base Address 
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#define  | UART4   ((Uart   *)0x400E1E00U) | 
|   | (UART4 ) Base Address 
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