| 
| 
#define  | MPC55XX_IRQ_INVALID   0x10000U | 
|   | 
| 
#define  | MPC55XX_IRQ_MIN   0U | 
|   | 
| 
#define  | MPC55XX_IRQ_SOFTWARE_MIN   0U | 
|   | 
| 
#define  | MPC55XX_IRQ_SOFTWARE_MAX   7U | 
|   | 
| 
#define  | MPC55XX_IRQ_SOFTWARE_GET_INDEX(v)   (v) | 
|   | 
| 
#define  | MPC55XX_IRQ_SOFTWARE_GET_REQUEST(i)   (i) | 
|   | 
| 
#define  | MPC55XX_IRQ_SOFTWARE_NUMBER   (MPC55XX_IRQ_SOFTWARE_MAX + 1U) | 
|   | 
| #define  | MPC55XX_IRQ_EDMA_ERROR(group) | 
|   | 
| #define  | MPC55XX_IRQ_EDMA(ch) | 
|   | 
| 
#define  | MPC55XX_IRQ_I2C(mod)   MPC55XX_IRQ_INVALID | 
|   | 
| 
#define  | MPC55XX_IRQ_SIU_EXTERNAL_0   46U | 
|   | 
| 
#define  | MPC55XX_IRQ_SIU_EXTERNAL_1   47U | 
|   | 
| 
#define  | MPC55XX_IRQ_SIU_EXTERNAL_2   48U | 
|   | 
| 
#define  | MPC55XX_IRQ_SIU_EXTERNAL_3   49U | 
|   | 
| 
#define  | MPC55XX_IRQ_SIU_EXTERNAL_4_15   50U | 
|   | 
| 
#define  | MPC55XX_IRQ_RTI   305U | 
|   | 
| 
#define  | MPC55XX_IRQ_PIT(ch)   (301U + (ch)) | 
|   | 
| #define  | MPC55XX_IRQ_ETPU_BASE(mod) | 
|   | 
| #define  | MPC55XX_IRQ_DSPI_BASE(mod) | 
|   | 
| #define  | MPC55XX_IRQ_EMIOS(ch) | 
|   | 
| #define  | MPC55XX_IRQ_EQADC_BASE(mod) | 
|   | 
| #define  | MPC55XX_IRQ_ESCI(mod) | 
|   | 
| #define  | MPC55XX_IRQ_CAN_BASE(mod) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_BASE(mod)   ((mod) == 0 ? 350U : MPC55XX_IRQ_INVALID) | 
|   | 
| 
#define  | MPC55XX_IRQ_NUMBER   (MPC55XX_IRQ_MAX + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ADC_EOC(mod)   (MPC55XX_IRQ_ADC_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ADC_ER(mod)   (MPC55XX_IRQ_ADC_BASE(mod) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ADC_WD(mod)   (MPC55XX_IRQ_ADC_BASE(mod) + 2U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ETIMER_TC(mod,  ch)   (MPC55XX_IRQ_ETIMER_BASE(mod) + (ch)) | 
|   | 
| 
#define  | MPC55XX_IRQ_ETIMER_WTIF(mod)   (MPC55XX_IRQ_ETIMER_BASE(mod) + 8U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ETIMER_RCF(mod)   (MPC55XX_IRQ_ETIMER_BASE(mod) + 10U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ETPU(mod)   (MPC55XX_IRQ_ETPU_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_ETPU_CHANNEL(mod,  ch)   (MPC55XX_IRQ_ETPU_BASE(mod) + 1U + (ch)) | 
|   | 
| 
#define  | MPC55XX_IRQ_DSPI_TFUF_RFOF(mod)   (MPC55XX_IRQ_DSPI_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_DSPI_EOQF(mod)   (MPC55XX_IRQ_DSPI_BASE(mod) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_DSPI_TFFF(mod)   (MPC55XX_IRQ_DSPI_BASE(mod) + 2U) | 
|   | 
| 
#define  | MPC55XX_IRQ_DSPI_TCF(mod)   (MPC55XX_IRQ_DSPI_BASE(mod) + 3U) | 
|   | 
| 
#define  | MPC55XX_IRQ_DSPI_RFDF(mod)   (MPC55XX_IRQ_DSPI_BASE(mod) + 4U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_TORF_RFOF_CFUF(mod)   (MPC55XX_IRQ_EQADC_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_NCF(mod,  fifo)   (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_PF(mod,  fifo)   (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_EOQF(mod,  fifo)   (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 2U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_CFFF(mod,  fifo)   (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 3U) | 
|   | 
| 
#define  | MPC55XX_IRQ_EQADC_RFDF(mod,  fifo)   (MPC55XX_IRQ_EQADC_BASE(mod) + 1U + (fifo) * 5U + 4U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BOFF_TWRN_RWRN(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_ERR(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_0(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 3U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_1(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 4U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_2(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 5U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_3(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 6U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_4(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 7U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_5(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 8U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_6(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 9U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_7(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 10U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_8(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 12U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_9(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 12U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_10(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 13U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_11(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 14U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_12(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 15U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_13(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 16U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_14(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 17U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_15(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 18U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_16_31(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 19U) | 
|   | 
| 
#define  | MPC55XX_IRQ_CAN_BUF_32_63(mod)   (MPC55XX_IRQ_CAN_BASE(mod) + 20U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXPWM_RF(mod,  ch)   (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXPWM_COF(mod,  ch)   (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXPWM_CAF(mod,  ch)   (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 3U * (ch) + 2U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXPWM_FFLAG(mod)   (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 12U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXPWM_REF(mod)   (MPC55XX_IRQ_FLEXPWM_BASE(mod) + 13U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_MIF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_PRIF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_CHIF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 2U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_WUP_IF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 3U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_FBNE_F(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 4U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_FANE_F(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 5U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_RBIF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 6U) | 
|   | 
| 
#define  | MPC55XX_IRQ_FLEXRAY_TBIF(mod)   (MPC55XX_IRQ_FLEXRAY_BASE(mod) + 7U) | 
|   | 
| 
#define  | MPC55XX_IRQ_LINFLEX_RXI(mod)   (MPC55XX_IRQ_LINFLEX_BASE(mod) + 0U) | 
|   | 
| 
#define  | MPC55XX_IRQ_LINFLEX_TXI(mod)   (MPC55XX_IRQ_LINFLEX_BASE(mod) + 1U) | 
|   | 
| 
#define  | MPC55XX_IRQ_LINFLEX_ERR(mod)   (MPC55XX_IRQ_LINFLEX_BASE(mod) + 2U) | 
|   | 
| #define  | MPC55XX_IRQ_IS_VALID(v) | 
|   | 
| #define  | MPC55XX_IRQ_IS_SOFTWARE(v) | 
|   | 
| 
#define  | MPC55XX_INTC_MIN_PRIORITY   1U | 
|   | 
| 
#define  | MPC55XX_INTC_MAX_PRIORITY   15U | 
|   | 
| 
#define  | MPC55XX_INTC_DISABLED_PRIORITY   0U | 
|   | 
| 
#define  | MPC55XX_INTC_INVALID_PRIORITY   (MPC55XX_INTC_MAX_PRIORITY + 1) | 
|   | 
| 
#define  | MPC55XX_INTC_DEFAULT_PRIORITY   (MPC55XX_INTC_MIN_PRIORITY + 1) | 
|   | 
| 
#define  | MPC55XX_INTC_IS_VALID_PRIORITY(p)   ((p) >= MPC55XX_INTC_DISABLED_PRIORITY && (p) <= MPC55XX_INTC_MAX_PRIORITY) | 
|   | 
| 
#define  | BSP_INTERRUPT_VECTOR_MIN   MPC55XX_IRQ_MIN | 
|   | 
| 
#define  | BSP_INTERRUPT_VECTOR_MAX   MPC55XX_IRQ_MAX | 
|   | 
| 
#define  | MPC55XX_IRQ_EDMA_GET_REQUEST(ch)   MPC55XX_IRQ_EDMA(ch) | 
|   | 
| 
#define  | MPC55XX_IRQ_EMIOS_GET_REQUEST(ch)   MPC55XX_IRQ_EMIOS(ch) | 
|   |