| 
| enum   | ALT_I2C_TRANSFER_TYPE_e {  
  ALT_I2C_TRANSFER_NONE = 0, 
ALT_I2C_TRANSFER_START = 1, 
ALT_I2C_TRANSFER_COMPLETE = 2, 
ALT_I2C_TRANSFER_READ = 3, 
 
  ALT_I2C_TRANSFER_WRITE = 4
 
 } | 
|   | 
| enum   | ALT_I2C_CTLR_e { ALT_I2C_I2C0 = (int)ALT_I2C0_OFST, 
ALT_I2C_I2C1 = (int)ALT_I2C1_OFST, 
ALT_I2C_I2C2 = (int)ALT_I2C2_OFST, 
ALT_I2C_I2C3 = (int)ALT_I2C3_OFST
 } | 
|   | 
| enum   | ALT_I2C_MODE_e { ALT_I2C_MODE_SLAVE = ALT_I2C_CON_MST_MOD_E_DIS, 
ALT_I2C_MODE_MASTER = ALT_I2C_CON_MST_MOD_E_EN
 } | 
|   | 
| enum   | ALT_I2C_SPEED_e { ALT_I2C_SPEED_STANDARD = ALT_I2C_CON_SPEED_E_STANDARD, 
ALT_I2C_SPEED_FAST = ALT_I2C_CON_SPEED_E_FAST
 } | 
|   | 
| enum   | ALT_I2C_ADDR_MODE_e { ALT_I2C_ADDR_MODE_7_BIT = ALT_I2C_TAR_IC_10BITADDR_MST_E_START7, 
ALT_I2C_ADDR_MODE_10_BIT = ALT_I2C_TAR_IC_10BITADDR_MST_E_START10
 } | 
|   | 
| enum   | ALT_I2C_STATUS_e {  
  ALT_I2C_STATUS_RX_UNDER = 1UL << 0, 
ALT_I2C_STATUS_RX_OVER = 1UL << 1, 
ALT_I2C_STATUS_RX_FULL = 1UL << 2, 
ALT_I2C_STATUS_TX_OVER = 1UL << 3, 
 
  ALT_I2C_STATUS_TX_EMPTY = 1UL << 4, 
ALT_I2C_STATUS_RD_REQ = 1UL << 5, 
ALT_I2C_STATUS_TX_ABORT = 1UL << 6, 
ALT_I2C_STATUS_RX_DONE = 1UL << 7, 
 
  ALT_I2C_STATUS_ACTIVITY = 1UL << 8, 
ALT_I2C_STATUS_STOP_DET = 1UL << 9, 
ALT_I2C_STATUS_START_DET = 1UL << 10, 
ALT_I2C_STATUS_INT_CALL = 1UL << 11, 
 
  ALT_I2C_STATUS_INT_ALL = 0xFFF
 
 } | 
|   | 
| enum   | ALT_I2C_TX_ABORT_CAUSE_e {  
  ALT_I2C_TX_ABORT_CAUSE_7B_ADDR_NOACK = 1UL << 0, 
ALT_I2C_TX_ABORT_CAUSE_10ADDR1_NOACK = 1UL << 1, 
ALT_I2C_TX_ABORT_CAUSE_10ADDR2_NOACK = 1UL << 2, 
ALT_I2C_TX_ABORT_CAUSE_TXDATA_NOACK = 1UL << 3, 
 
  ALT_I2C_TX_ABORT_CAUSE_GCALL_NOACK = 1UL << 4, 
ALT_I2C_TX_ABORT_CAUSE_GCALL_RD = 1UL << 5, 
ALT_I2C_TX_ABORT_CAUSE_HS_ACKDET = 1UL << 6, 
ALT_I2C_TX_ABORT_CAUSE_SBYTE_ACKDET = 1UL << 7, 
 
  ALT_I2C_TX_ABORT_CAUSE_HS_NORSTRT = 1UL << 8, 
ALT_I2C_TX_ABORT_CAUSE_SBYTE_NORSTRT = 1UL << 9, 
ALT_I2C_TX_ABORT_CAUSE_10B_RD_NORSTRT = 1UL << 10, 
ALT_I2C_TX_ABORT_CAUSE_MST_DIS = 1UL << 11, 
 
  ALT_I2C_TX_ABORT_CAUSE_ARB_LOST = 1UL << 12, 
ALT_I2C_TX_ABORT_CAUSE_SLVFLUSH_TXFIFO = 1UL << 13, 
ALT_I2C_TX_ABORT_CAUSE_SLV_ARBLOST = 1UL << 14, 
ALT_I2C_TX_ABORT_CAUSE_SLVRD_INTX = 1UL << 15
 
 } | 
|   | 
 | 
| ALT_STATUS_CODE  | alt_i2c_init (const ALT_I2C_CTLR_t i2c, ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_reset (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_uninit (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_disable (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_enable (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_is_enabled (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_config_get (ALT_I2C_DEV_t *i2c_dev, ALT_I2C_MASTER_CONFIG_t *cfg) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_config_set (ALT_I2C_DEV_t *i2c_dev, const ALT_I2C_MASTER_CONFIG_t *cfg) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_config_speed_get (ALT_I2C_DEV_t *i2c_dev, const ALT_I2C_MASTER_CONFIG_t *cfg, uint32_t *speed_in_hz) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_config_speed_set (ALT_I2C_DEV_t *i2c_dev, ALT_I2C_MASTER_CONFIG_t *cfg, uint32_t speed_in_hz) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_slave_config_get (ALT_I2C_DEV_t *i2c_dev, ALT_I2C_SLAVE_CONFIG_t *cfg) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_slave_config_set (ALT_I2C_DEV_t *i2c_dev, const ALT_I2C_SLAVE_CONFIG_t *cfg) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_sda_hold_time_get (ALT_I2C_DEV_t *i2c_dev, uint16_t *hold_time) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_sda_hold_time_set (ALT_I2C_DEV_t *i2c_dev, const uint16_t hold_time) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_op_mode_get (ALT_I2C_DEV_t *i2c_dev, ALT_I2C_MODE_t *mode) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_op_mode_set (ALT_I2C_DEV_t *i2c_dev, const ALT_I2C_MODE_t mode) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_is_busy (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_read (ALT_I2C_DEV_t *i2c_dev, uint8_t *val) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_write (ALT_I2C_DEV_t *i2c_dev, const uint8_t val) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_slave_receive (ALT_I2C_DEV_t *i2c_dev, uint8_t *data) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_slave_transmit (ALT_I2C_DEV_t *i2c_dev, const uint8_t data) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_slave_bulk_transmit (ALT_I2C_DEV_t *i2c_dev, const void *data, const size_t size) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_target_get (ALT_I2C_DEV_t *i2c_dev, uint32_t *target_addr) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_target_set (ALT_I2C_DEV_t *i2c_dev, uint32_t target_addr) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_transmit (ALT_I2C_DEV_t *i2c_dev, const void *data, const size_t size, const bool issue_restart, const bool issue_stop) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_receive (ALT_I2C_DEV_t *i2c_dev, void *data, const size_t size, const bool issue_restart, const bool issue_stop) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_issue_read (ALT_I2C_DEV_t *i2c_dev, const bool issue_restart, const bool issue_stop) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_issue_write (ALT_I2C_DEV_t *i2c_dev, const uint8_t value, const bool issue_restart, const bool issue_stop) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_master_general_call (ALT_I2C_DEV_t *i2c_dev, const void *data, const size_t size, const bool issue_restart, const bool issue_stop) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_general_call_ack_disable (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_general_call_ack_enable (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_general_call_ack_is_enabled (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_int_status_get (ALT_I2C_DEV_t *i2c_dev, uint32_t *status) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_int_raw_status_get (ALT_I2C_DEV_t *i2c_dev, uint32_t *status) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_int_clear (ALT_I2C_DEV_t *i2c_dev, const uint32_t mask) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_int_disable (ALT_I2C_DEV_t *i2c_dev, const uint32_t mask) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_int_enable (ALT_I2C_DEV_t *i2c_dev, const uint32_t mask) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_abort_cause_get (ALT_I2C_DEV_t *i2c_dev, ALT_I2C_TX_ABORT_CAUSE_t *cause) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_fifo_is_empty (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_fifo_is_full (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_fifo_level_get (ALT_I2C_DEV_t *i2c_dev, uint32_t *num_entries) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_fifo_threshold_get (ALT_I2C_DEV_t *i2c_dev, uint8_t *threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_fifo_threshold_set (ALT_I2C_DEV_t *i2c_dev, const uint8_t threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_fifo_is_empty (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_fifo_is_full (ALT_I2C_DEV_t *i2c_dev) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_fifo_level_get (ALT_I2C_DEV_t *i2c_dev, uint32_t *num_entries) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_fifo_threshold_get (ALT_I2C_DEV_t *i2c_dev, uint8_t *threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_fifo_threshold_set (ALT_I2C_DEV_t *i2c_dev, const uint8_t threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_dma_threshold_get (ALT_I2C_DEV_t *i2c_dev, uint8_t *threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_rx_dma_threshold_set (ALT_I2C_DEV_t *i2c_dev, uint8_t threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_dma_threshold_get (ALT_I2C_DEV_t *i2c_dev, uint8_t *threshold) | 
|   | 
| ALT_STATUS_CODE  | alt_i2c_tx_dma_threshold_set (ALT_I2C_DEV_t *i2c_dev, uint8_t threshold) | 
|   | 
Altera - I2C Controller API