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#define | _AVR_IOXXX_H_ "iotnx5.h" |
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#define | ADCSRB _SFR_IO8 (0x03) |
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#define | BIN 7 |
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#define | ACME 6 |
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#define | IPR 5 |
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#define | ADTS2 2 |
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#define | ADTS1 1 |
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#define | ADTS0 0 |
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#define | ADC _SFR_IO16(0x04) |
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#define | ADCW _SFR_IO16(0x04) |
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#define | ADCL _SFR_IO8(0x04) |
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#define | ADCH _SFR_IO8(0x05) |
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#define | ADCSRA _SFR_IO8 (0x06) |
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#define | ADEN 7 |
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#define | ADSC 6 |
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#define | ADATE 5 |
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#define | ADIF 4 |
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#define | ADIE 3 |
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#define | ADPS2 2 |
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#define | ADPS1 1 |
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#define | ADPS0 0 |
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#define | ADMUX _SFR_IO8(0x07) |
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#define | REFS1 7 |
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#define | REFS0 6 |
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#define | ADLAR 5 |
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#define | REFS2 4 |
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#define | MUX3 3 |
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#define | MUX2 2 |
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#define | MUX1 1 |
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#define | MUX0 0 |
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#define | ACSR _SFR_IO8(0x08) |
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#define | ACD 7 |
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#define | ACBG 6 |
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#define | ACO 5 |
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#define | ACI 4 |
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#define | ACIE 3 |
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#define | ACIS1 1 |
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#define | ACIS0 0 |
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#define | USICR _SFR_IO8(0x0D) |
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#define | USISIE 7 |
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#define | USIOIE 6 |
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#define | USIWM1 5 |
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#define | USIWM0 4 |
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#define | USICS1 3 |
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#define | USICS0 2 |
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#define | USICLK 1 |
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#define | USITC 0 |
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#define | USISR _SFR_IO8(0x0E) |
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#define | USISIF 7 |
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#define | USIOIF 6 |
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#define | USIPF 5 |
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#define | USIDC 4 |
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#define | USICNT3 3 |
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#define | USICNT2 2 |
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#define | USICNT1 1 |
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#define | USICNT0 0 |
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#define | USIDR _SFR_IO8(0x0F) |
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#define | USIBR _SFR_IO8(0x10) |
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#define | GPIOR0 _SFR_IO8(0x11) |
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#define | GPIOR1 _SFR_IO8(0x12) |
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#define | GPIOR2 _SFR_IO8(0x13) |
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#define | DIDR0 _SFR_IO8(0x14) |
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#define | ADC0D 5 |
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#define | ADC2D 4 |
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#define | ADC3D 3 |
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#define | ADC1D 2 |
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#define | AIN1D 1 |
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#define | AIN0D 0 |
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#define | PCMSK _SFR_IO8(0x15) |
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#define | PCINT5 5 |
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#define | PCINT4 4 |
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#define | PCINT3 3 |
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#define | PCINT2 2 |
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#define | PCINT1 1 |
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#define | PCINT0 0 |
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#define | PINB _SFR_IO8(0x16) |
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#define | PINB5 5 |
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#define | PINB4 4 |
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#define | PINB3 3 |
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#define | PINB2 2 |
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#define | PINB1 1 |
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#define | PINB0 0 |
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#define | DDRB _SFR_IO8(0x17) |
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#define | DDB5 5 |
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#define | DDB4 4 |
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#define | DDB3 3 |
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#define | DDB2 2 |
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#define | DDB1 1 |
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#define | DDB0 0 |
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#define | PORTB _SFR_IO8(0x18) |
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#define | PB5 5 |
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#define | PB4 4 |
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#define | PB3 3 |
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#define | PB2 2 |
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#define | PB1 1 |
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#define | PB0 0 |
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#define | EECR _SFR_IO8(0x1C) |
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#define | EEPM1 5 |
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#define | EEPM0 4 |
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#define | EERIE 3 |
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#define | EEMPE 2 |
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#define | EEPE 1 |
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#define | EERE 0 |
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#define | EEDR _SFR_IO8(0x1D) |
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#define | EEAR _SFR_IO16(0x1E) |
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#define | EEARL _SFR_IO8(0x1E) |
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#define | EEARH _SFR_IO8(0x1F) |
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#define | PRR _SFR_IO8(0x20) |
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#define | PRTIM1 3 |
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#define | PRTIM0 2 |
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#define | PRUSI 1 |
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#define | PRADC 0 |
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#define | WDTCR _SFR_IO8(0x21) |
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#define | WDIF 7 |
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#define | WDIE 6 |
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#define | WDP3 5 |
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#define | WDCE 4 |
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#define | WDE 3 |
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#define | WDP2 2 |
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#define | WDP1 1 |
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#define | WDP0 0 |
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#define | DWDR _SFR_IO8(0x22) |
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#define | DTPS1 _SFR_IO8(0x23) |
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#define | DTPS11 1 |
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#define | DTPS10 0 |
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#define | DT1B _SFR_IO8(0x24) |
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#define | DT1BH3 7 |
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#define | DT1BH2 6 |
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#define | DT1BH1 5 |
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#define | DT1BH0 4 |
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#define | DT1BL3 3 |
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#define | DT1BL2 2 |
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#define | DT1BL1 1 |
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#define | DT1BL0 0 |
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#define | DT1A _SFR_IO8(0x25) |
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#define | DT1AH3 7 |
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#define | DT1AH2 6 |
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#define | DT1AH1 5 |
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#define | DT1AH0 4 |
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#define | DT1AL3 3 |
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#define | DT1AL2 2 |
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#define | DT1AL1 1 |
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#define | DT1AL0 0 |
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#define | CLKPR _SFR_IO8(0x26) |
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#define | CLKPCE 7 |
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#define | CLKPS3 3 |
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#define | CLKPS2 2 |
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#define | CLKPS1 1 |
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#define | CLKPS0 0 |
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#define | PLLCSR _SFR_IO8(0x27) |
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#define | LSM 7 |
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#define | PCKE 2 |
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#define | PLLE 1 |
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#define | PLOCK 0 |
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#define | OCR0B _SFR_IO8(0x28) |
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#define | OCR0A _SFR_IO8(0x29) |
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#define | TCCR0A _SFR_IO8(0x2A) |
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#define | COM0A1 7 |
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#define | COM0A0 6 |
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#define | COM0B1 5 |
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#define | COM0B0 4 |
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#define | WGM01 1 |
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#define | WGM00 0 |
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#define | OCR1B _SFR_IO8(0x2B) |
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#define | GTCCR _SFR_IO8(0x2C) |
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#define | TSM 7 |
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#define | PWM1B 6 |
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#define | COM1B1 5 |
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#define | COM1B0 4 |
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#define | FOC1B 3 |
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#define | FOC1A 2 |
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#define | PSR1 1 |
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#define | PSR0 0 |
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#define | OCR1C _SFR_IO8(0x2D) |
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#define | OCR1A _SFR_IO8(0x2E) |
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#define | TCNT1 _SFR_IO8(0x2F) |
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#define | TCCR1 _SFR_IO8(0x30) |
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#define | CTC1 7 |
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#define | PWM1A 6 |
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#define | COM1A1 5 |
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#define | COM1A0 4 |
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#define | CS13 3 |
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#define | CS12 2 |
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#define | CS11 1 |
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#define | CS10 0 |
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#define | OSCCAL _SFR_IO8(0x31) |
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#define | TCNT0 _SFR_IO8(0x32) |
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#define | TCCR0B _SFR_IO8(0x33) |
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#define | FOC0A 7 |
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#define | FOC0B 6 |
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#define | WGM02 3 |
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#define | CS02 2 |
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#define | CS01 1 |
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#define | CS00 0 |
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#define | MCUSR _SFR_IO8(0x34) |
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#define | WDRF 3 |
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#define | BORF 2 |
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#define | EXTRF 1 |
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#define | PORF 0 |
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#define | MCUCR _SFR_IO8(0x35) |
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#define | BODS 7 |
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#define | PUD 6 |
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#define | SE 5 |
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#define | SM1 4 |
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#define | SM0 3 |
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#define | BODSE 2 |
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#define | ISC01 1 |
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#define | ISC00 0 |
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#define | SPMCSR _SFR_IO8(0x37) |
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#define | RSIG 5 |
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#define | CTPB 4 |
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#define | RFLB 3 |
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#define | PGWRT 2 |
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#define | PGERS 1 |
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#define | SPMEN 0 |
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#define | TIFR _SFR_IO8(0x38) |
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#define | OCF1A 6 |
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#define | OCF1B 5 |
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#define | OCF0A 4 |
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#define | OCF0B 3 |
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#define | TOV1 2 |
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#define | TOV0 1 |
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#define | TIMSK _SFR_IO8(0x39) |
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#define | OCIE1A 6 |
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#define | OCIE1B 5 |
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#define | OCIE0A 4 |
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#define | OCIE0B 3 |
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#define | TOIE1 2 |
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#define | TOIE0 1 |
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#define | GIFR _SFR_IO8(0x3A) |
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#define | INTF0 6 |
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#define | PCIF 5 |
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#define | GIMSK _SFR_IO8(0x3B) |
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#define | INT0 6 |
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#define | PCIE 5 |
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#define | INT0_vect _VECTOR(1) |
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#define | SIG_INTERRUPT0 _VECTOR(1) |
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#define | PCINT0_vect _VECTOR(2) |
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#define | SIG_PIN_CHANGE _VECTOR(2) |
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#define | TIM1_COMPA_vect _VECTOR(3) |
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#define | TIMER1_COMPA_vect _VECTOR(3) |
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#define | SIG_OUTPUT_COMPARE1A _VECTOR(3) |
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#define | TIM1_OVF_vect _VECTOR(4) |
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#define | TIMER1_OVF_vect _VECTOR(4) |
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#define | SIG_OVERFLOW1 _VECTOR(4) |
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#define | TIM0_OVF_vect _VECTOR(5) |
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#define | TIMER0_OVF_vect _VECTOR(5) |
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#define | SIG_OVERFLOW0 _VECTOR(5) |
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#define | EE_RDY_vect _VECTOR(6) |
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#define | SIG_EEPROM_READY _VECTOR(6) |
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#define | ANA_COMP_vect _VECTOR(7) |
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#define | SIG_COMPARATOR _VECTOR(7) |
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#define | ADC_vect _VECTOR(8) |
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#define | SIG_ADC _VECTOR(8) |
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#define | TIM1_COMPB_vect _VECTOR(9) |
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#define | TIMER1_COMPB_vect _VECTOR(9) |
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#define | SIG_OUTPUT_COMPARE1B _VECTOR(9) |
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#define | TIM0_COMPA_vect _VECTOR(10) |
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#define | TIMER0_COMPA_vect _VECTOR(10) |
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#define | SIG_OUTPUT_COMPARE0A _VECTOR(10) |
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#define | TIM0_COMPB_vect _VECTOR(11) |
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#define | TIMER0_COMPB_vect _VECTOR(11) |
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#define | SIG_OUTPUT_COMPARE0B _VECTOR(11) |
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#define | WDT_vect _VECTOR(12) |
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#define | SIG_WATCHDOG_TIMEOUT _VECTOR(12) |
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#define | USI_START_vect _VECTOR(13) |
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#define | SIG_USI_START _VECTOR(13) |
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#define | USI_OVF_vect _VECTOR(14) |
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#define | SIG_USI_OVERFLOW _VECTOR(14) |
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#define | _VECTORS_SIZE 30 |
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