RTEMS Porting Guide
The _CPU_ISR_Set_level routine maps the interrupt level in the Classic API task mode onto the hardware that the CPU actually provides. Currently, interrupt levels that do not map onto the CPU in a generic fashion are undefined. Someday, it would be nice if these were "mapped" by the application via a callout. For example, the Motorola m68k has 8 levels 0 - 7, and levels 8 - 255 are currently undefined. Levels 8 - 255 would be available for bsp/application specific meaning. This could be used to manage a programmable interrupt controller via the rtems_task_mode directive.
The following is a dummy implementation of the _CPU_ISR_Set_level routine:
#define _CPU_ISR_Set_level( new_level ) \
{ \
}
The following is the implementation from the Motorola M68K:
XXX insert m68k implementation here
RTEMS Porting Guide
Copyright © 1988-2004 OAR Corporation