RTEMS 4.10.2 On-Line Library

MIPS Specific Information

RTEMS CPU Architecture Supplement

Chapter 8: MIPS Specific Information

MIPS Specific Information CPU Model Dependent Features

MIPS Specific Information Calling Conventions

MIPS Specific Information Memory Model

MIPS Specific Information Interrupt Processing

MIPS Specific Information Default Fatal Error Processing

MIPS Specific Information Board Support Packages

This chapter discusses the MIPS architecture dependencies in this port of RTEMS. The MIPS family has a wide variety of implementations by a wide range of vendors. Consequently, there are many, many CPU models within it.

Architecture Documents

IDT docs are online at http://www.idt.com/products/risc/Welcome.html

For information on the XXX architecture, refer to the following documents available from VENDOR (`http//www.XXX.com/'):

XXX Family Reference, VENDOR, PART NUMBER.

RTEMS CPU Architecture Supplement