RTEMS Intel i960 Applications Supplement
The PRCB contains the base addresses for system data structures, and initial configuration information for the core and integrated peripherals. In particular, the PRCB contains the initial contents of the Arithmetic Control (AC) Register as well as the base addresses of the Interrupt Vector Table, System Procedure Entry Table, Fault Entry Table, and the Control Table. In addition, the PRCB is used to configure the depth of the instruction and register caches and the actions when certain types of faults are encountered.
The Process Controls (PC) Register is initialized to 0xC01F2002 which sets the i960CA's interrupt level to 0x1F (31 decimal). In addition, the Interrupt Mask (IMSK) Register (alternately referred to as Special Function Register 1 or sf1) is set to 0x00000000 to mask all external and DMA interrupt sources. Thus, all interrupts are disabled when the first instruction is executed.
For more information regarding the i960CA's data structures and their contents, refer to Intel's i960CA User's Manual.
RTEMS Intel i960 Applications Supplement
Copyright © 1988-2000 OAR Corporation