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cpuimpl.h
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1 
7 /*
8  * Copyright (c) 2013 embedded brains GmbH
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef _RTEMS_SCORE_CPUIMPL_H
16 #define _RTEMS_SCORE_CPUIMPL_H
17 
18 #include <rtems/score/cpu.h>
19 
29 #define CPU_PER_CPU_CONTROL_SIZE 0
30 
31 #ifndef ASM
32 
33 #ifdef __cplusplus
34 extern "C" {
35 #endif
36 
37 RTEMS_INLINE_ROUTINE void _CPU_Context_volatile_clobber( uintptr_t pattern )
38 {
39  /* TODO */
40 }
41 
42 RTEMS_INLINE_ROUTINE void _CPU_Context_validate( uintptr_t pattern )
43 {
44  while (1) {
45  /* TODO */
46  }
47 }
48 
50 {
51  __asm__ volatile ( ".word 0" );
52 }
53 
55 {
56  __asm__ volatile ( "nop" );
57 }
58 
59 #ifdef __cplusplus
60 }
61 #endif
62 
63 #endif /* ASM */
64 
67 #endif /* _RTEMS_SCORE_CPUIMPL_H */
#define RTEMS_INLINE_ROUTINE
Definition: basedefs.h:65
RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation(void)
Emits a no operation instruction (nop).
Definition: cpuimpl.h:132
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal(void)
Emits an illegal instruction.
Definition: cpuimpl.h:122