RTEMS  5.0.0
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sc16is752.h
1 /*
2  * Copyright (c) 2016 embedded brains GmbH. All rights reserved.
3  *
4  * embedded brains GmbH
5  * Dornierstr. 4
6  * 82178 Puchheim
7  * Germany
8  * <info@embedded-brains.de>
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef _DEV_SERIAL_SC16IS752_H
16 #define _DEV_SERIAL_SC16IS752_H
17 
18 #include <sys/ioccom.h>
19 
20 #include <rtems/termiostypes.h>
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif /* __cplusplus */
25 
32 typedef enum {
33  SC16IS752_MODE_RS232,
34  SC16IS752_MODE_RS485
35 } sc16is752_mode;
36 
38 
44 
50  int (*write_reg)(
51  sc16is752_context *ctx,
52  uint8_t addr,
53  const uint8_t *data,
54  size_t len
55  );
56 
62  int (*read_reg)(
63  sc16is752_context *ctx,
64  uint8_t addr,
65  uint8_t *data,
66  size_t len
67  );
68 
74  int (*read_2_reg)(
75  sc16is752_context *ctx,
76  uint8_t addr_0,
77  uint8_t addr_1,
78  uint8_t data[2]
79  );
80 
87 
94 
101 
108 
114  sc16is752_mode mode;
115 
122  uint32_t input_frequency;
123 
130 
136  uint8_t ier;
137 
143  uint8_t tx_in_progress;
144 
150  uint8_t tx_fifo_free;
151 
157  uint8_t lcr;
158 
164  uint8_t efcr;
165 };
166 
170 typedef struct {
171  sc16is752_context base;
172 
178  int fd;
179 
185  uint8_t cs;
186 
192  uint32_t speed_hz;
193 
199  const char *spi_path;
201 
205 typedef struct {
206  sc16is752_context base;
207 
213  int fd;
214 
220  const char *bus_path;
222 
223 const rtems_termios_device_handler sc16is752_termios_handler;
224 
230 void sc16is752_interrupt_handler(void *arg);
231 
241 rtems_status_code sc16is752_spi_create(
243  const char *device_path
244 );
245 
251 #define SC16IS752_SET_SLEEP_MODE _IOW('d', 0, int)
252 
259 #define SC16IS752_SET_IOCONTROL _IOW('d', 1, uint8_t)
260 
264 #define SC16IS752_SET_IODIR _IOW('d', 2, uint8_t)
265 
269 #define SC16IS752_SET_IOSTATE _IOW('d', 3, uint8_t)
270 
274 #define SC16IS752_GET_SLEEP_MODE _IOR('d', 0, int)
275 
279 #define SC16IS752_GET_IOCONTROL _IOR('d', 1, uint8_t)
280 
284 #define SC16IS752_GET_IODIR _IOR('d', 2, uint8_t)
285 
289 #define SC16IS752_GET_IOSTATE _IOR('d', 3, uint8_t)
290 
295 #define SC16IS752_IOCONTROL_SRESET (1u << 3)
296 #define SC16IS752_IOCONTROL_GPIO_3_0_OR_MODEM (1u << 2)
297 #define SC16IS752_IOCONTROL_GPIO_7_4_OR_MODEM (1u << 1)
298 #define SC16IS752_IOCONTROL_IOLATCH (1u << 0)
299 
303 #ifdef __cplusplus
304 }
305 #endif /* __cplusplus */
306 
307 #endif /* _DEV_SERIAL_SC16IS752_H */
bool(* first_open)(sc16is752_context *ctx)
First open.
Definition: sc16is752.h:86
uint8_t efcr
Shadow Extra Features Control Register (EFCR).
Definition: sc16is752.h:164
SC16IS752 I2C context.
Definition: sc16is752.h:205
int fd
The I2C bus device file descriptor.
Definition: sc16is752.h:213
int(* read_reg)(sc16is752_context *ctx, uint8_t addr, uint8_t *data, size_t len)
Reads a register.
Definition: sc16is752.h:62
Termios device context.
Definition: termiostypes.h:75
sc16is752_mode mode
Device mode.
Definition: sc16is752.h:114
uint8_t tx_in_progress
Characters placed into transmit FIFO.
Definition: sc16is752.h:143
const char * spi_path
The SPI bus device path.
Definition: sc16is752.h:199
rtems_termios_tty * tty
Corresponding Termios structure.
Definition: sc16is752.h:129
int(* write_reg)(sc16is752_context *ctx, uint8_t addr, const uint8_t *data, size_t len)
Writes a register.
Definition: sc16is752.h:50
rtems_status_code
Classic API Status.
Definition: status.h:43
SC16IS752 SPI context.
Definition: sc16is752.h:170
bool(* install_irq)(sc16is752_context *ctx)
Shall install the interrupt handler.
Definition: sc16is752.h:100
Definition: termiostypes.h:283
void(* remove_irq)(sc16is752_context *ctx)
Shall remove the interrupt handler.
Definition: sc16is752.h:107
uint32_t input_frequency
Input frequency in Hertz (dependent on crystal, see XTAL1 and XTAL2 pins).
Definition: sc16is752.h:122
uint8_t ier
Shadow Interrupt Enable Register (IER).
Definition: sc16is752.h:136
const char * bus_path
The I2C bus device path.
Definition: sc16is752.h:220
int(* read_2_reg)(sc16is752_context *ctx, uint8_t addr_0, uint8_t addr_1, uint8_t data[2])
Reads two registers.
Definition: sc16is752.h:74
SC16IS752 device context.
Definition: sc16is752.h:42
uint8_t tx_fifo_free
Count of free characters in the transmit FIFO.
Definition: sc16is752.h:150
int fd
The SPI bus device file descriptor.
Definition: sc16is752.h:178
void(* last_close)(sc16is752_context *ctx)
Last close.
Definition: sc16is752.h:93
uint32_t speed_hz
The SPI bus speed in Hertz.
Definition: sc16is752.h:192
uint8_t lcr
Shadow Line Control Register (LCR).
Definition: sc16is752.h:157
Termios device handler.
Definition: termiostypes.h:141
uint8_t cs
The SPI device chip select.
Definition: sc16is752.h:185