RTEMS  5.0.0
irq.h
1 /*
2  * Interrupt handler Header file
3  *
4  * Copyright (c) 2010 embedded brains GmbH.
5  *
6  * Copyright (c) 2004 by Jay Monkman <jtm@lopingdog.com>
7  *
8  * The license and distribution terms for this file may be
9  * found in the file LICENSE in this distribution or at
10  * http://www.rtems.org/license/LICENSE.
11  */
12 
13 #ifndef __IRQ_H__
14 #define __IRQ_H__
15 
16 #ifndef __asm__
17 
18 #include <rtems.h>
19 #include <rtems/irq.h>
20 #include <rtems/irq-extension.h>
21 
22 #endif /* __asm__ */
23 
24 /* possible interrupt sources on the MC9328MXL */
25 #define BSP_INT_UART3_PFERR 0
26 #define BSP_INT_UART3_RTS 1
27 #define BSP_INT_UART3_DTR 2
28 #define BSP_INT_UART3_UARTC 3
29 #define BSP_INT_UART3_TX 4
30 #define BSP_INT_PEN_UP 5
31 #define BSP_INT_CSI 6
32 #define BSP_INT_MMA_MAC 7
33 #define BSP_INT_MMA 8
34 #define BSP_INT_COMP 9
35 #define BSP_INT_MSIRQ 10
36 #define BSP_INT_GPIO_PORTA 11
37 #define BSP_INT_GPIO_PORTB 12
38 #define BSP_INT_GPIO_PORTC 13
39 #define BSP_INT_LCDC 14
40 #define BSP_INT_SIM_IRQ 15
41 #define BSP_INT_SIM_DATA 16
42 #define BSP_INT_RTC 17
43 #define BSP_INT_RTC_SAM 18
44 #define BSP_INT_UART2_PFERR 19
45 #define BSP_INT_UART2_RTS 20
46 #define BSP_INT_UART2_DTR 21
47 #define BSP_INT_UART2_UARTC 22
48 #define BSP_INT_UART2_TX 23
49 #define BSP_INT_UART2_RX 24
50 #define BSP_INT_UART1_PFERR 25
51 #define BSP_INT_UART1_RTS 26
52 #define BSP_INT_UART1_DTR 27
53 #define BSP_INT_UART1_UARTC 28
54 #define BSP_INT_UART1_TX 29
55 #define BSP_INT_UART1_RX 30
56 #define BSP_INT_RES31 31
57 #define BSP_INT_RES32 32
58 #define BSP_INT_PEN_DATA 33
59 #define BSP_INT_PWM 34
60 #define BSP_INT_MMC_IRQ 35
61 #define BSP_INT_SSI2_TX 36
62 #define BSP_INT_SSI2_RX 37
63 #define BSP_INT_SSI2_ERR 38
64 #define BSP_INT_I2C 39
65 #define BSP_INT_SPI2 40
66 #define BSP_INT_SPI1 41
67 #define BSP_INT_SSI_TX 42
68 #define BSP_INT_SSI_TX_ERR 43
69 #define BSP_INT_SSI_RX 44
70 #define BSP_INT_SSI_RX_ERR 45
71 #define BSP_INT_TOUCH 46
72 #define BSP_INT_USBD0 47
73 #define BSP_INT_USBD1 48
74 #define BSP_INT_USBD2 49
75 #define BSP_INT_USBD3 50
76 #define BSP_INT_USBD4 51
77 #define BSP_INT_USBD5 52
78 #define BSP_INT_USBD6 53
79 #define BSP_INT_UART3_RX 54
80 #define BSP_INT_BTSYS 55
81 #define BSP_INT_BTTIM 56
82 #define BSP_INT_BTWUI 57
83 #define BSP_INT_TIMER2 58
84 #define BSP_INT_TIMER1 59
85 #define BSP_INT_DMA_ERR 60
86 #define BSP_INT_DMA 61
87 #define BSP_INT_GPIO_PORTD 62
88 #define BSP_INT_WDT 63
89 #define BSP_MAX_INT 64
90 
91 #define BSP_INTERRUPT_VECTOR_MIN 0
92 
93 #define BSP_INTERRUPT_VECTOR_MAX (BSP_MAX_INT - 1)
94 
95 #endif /* __IRQ_H__ */
Header file for the Interrupt Manager Extension.