RTEMS  5.0.0
Data Structures | Macros

RTEMS Port of Linux SPI API. More...

#include <sys/ioccom.h>
#include <stddef.h>
#include <stdint.h>

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Data Structures

struct  spi_ioc_transfer
 SPI transfer message. More...
 

Macros

#define SPI_IOC_MAGIC   's'
 
#define SPI_MSGSIZE(n)
 Calculates the size of the SPI message array. More...
 
#define SPI_IOC_MESSAGE(n)   _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(n)])
 Transfers an array with SPI messages.
 
#define SPI_IOC_RD_MODE   _IOR(SPI_IOC_MAGIC, 1, uint8_t)
 Reads the least-significant 8-bits of the SPI default mode.
 
#define SPI_IOC_WR_MODE   _IOW(SPI_IOC_MAGIC, 1, uint8_t)
 Writes the SPI default mode (the most-significant 24-bits of the mode are set to zero).
 
#define SPI_IOC_RD_LSB_FIRST   _IOR(SPI_IOC_MAGIC, 2, uint8_t)
 Reads the SPI default least-significant bit first setting.
 
#define SPI_IOC_WR_LSB_FIRST   _IOW(SPI_IOC_MAGIC, 2, uint8_t)
 Writes the SPI default least-significant-bit first setting.
 
#define SPI_IOC_RD_BITS_PER_WORD   _IOR(SPI_IOC_MAGIC, 3, uint8_t)
 Reads the SPI default bits per word.
 
#define SPI_IOC_WR_BITS_PER_WORD   _IOW(SPI_IOC_MAGIC, 3, uint8_t)
 Writes the SPI default bits per word.
 
#define SPI_IOC_RD_MAX_SPEED_HZ   _IOR(SPI_IOC_MAGIC, 4, uint32_t)
 Reads the SPI default speed in Hz.
 
#define SPI_IOC_WR_MAX_SPEED_HZ   _IOW(SPI_IOC_MAGIC, 4, uint32_t)
 Writes the SPI default speed in Hz.
 
#define SPI_IOC_RD_MODE32   _IOR(SPI_IOC_MAGIC, 5, uint32_t)
 Reads the full 32-bit SPI default mode.
 
#define SPI_IOC_WR_MODE32   _IOW(SPI_IOC_MAGIC, 5, uint32_t)
 Writes the full 32-bit SPI default mode.
 
SPI Transfer Flags
#define SPI_CPHA   0x01
 SPI transfer flag which sets the clock phase.
 
#define SPI_CPOL   0x02
 SPI transfer flag which sets the clock polarity.
 
#define SPI_MODE_0   0
 SPI transfer flag which sets SPI Mode 0 (clock starts low, sample on leading edge).
 
#define SPI_MODE_1   SPI_CPHA
 SPI transfer flag which sets SPI Mode 0 (clock starts low, sample on trailing edge).
 
#define SPI_MODE_2   SPI_CPOL
 SPI transfer flag which sets SPI Mode 0 (clock starts high, sample on leading edge).
 
#define SPI_MODE_3   (SPI_CPOL | SPI_CPHA)
 SPI transfer flag which sets SPI Mode 0 (clock starts high, sample on trailing edge).
 
#define SPI_CS_HIGH   0x04
 SPI transfer flag which selects the device by setting the chip select line.
 
#define SPI_LSB_FIRST   0x08
 SPI transfer flag which triggers data transmission with the LSB being sent first.
 
#define SPI_3WIRE   0x10
 SPI transfer flag which uses a shared wire for master input/slave output as well as master output/slave input.
 
#define SPI_LOOP   0x20
 SPI transfer flag which initiates the loopback mode.
 
#define SPI_NO_CS   0x40
 SPI transfer flag which indicates that no chip select is needed due to only one device on the bus.
 
#define SPI_READY   0x80
 SPI transfer flag which pulls the slave to low level during pause.
 
#define SPI_TX_DUAL   0x100
 SPI transfer flag which sets up dual mode for transmission.
 
#define SPI_TX_QUAD   0x200
 SPI transfer flag which sets up quad mode for transmission.
 
#define SPI_RX_DUAL   0x400
 SPI transfer flag which sets up dual mode for reception.
 
#define SPI_RX_QUAD   0x800
 SPI transfer flag which sets up quad mode for reception.
 

Detailed Description

RTEMS Port of Linux SPI API.