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#define | NS16550_STATIC static |
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#define | NS16550_RECEIVE_BUFFER 0 |
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#define | NS16550_TRANSMIT_BUFFER 0 |
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#define | NS16550_DIVISOR_LATCH_L 0 |
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#define | NS16550_INTERRUPT_ENABLE 1 |
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#define | NS16550_DIVISOR_LATCH_M 1 |
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#define | NS16550_INTERRUPT_ID 2 |
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#define | NS16550_FIFO_CONTROL 2 |
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#define | NS16550_LINE_CONTROL 3 |
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#define | NS16550_MODEM_CONTROL 4 |
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#define | NS16550_LINE_STATUS 5 |
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#define | NS16550_MODEM_STATUS 6 |
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#define | NS16550_SCRATCH_PAD 7 |
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#define | NS16550_FRACTIONAL_DIVIDER 10 |
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#define | SP_INT_RX_ENABLE 0x01 |
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#define | SP_INT_TX_ENABLE 0x02 |
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#define | SP_INT_LS_ENABLE 0x04 |
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#define | SP_INT_MS_ENABLE 0x08 |
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#define | NS16550_ENABLE_ALL_INTR (SP_INT_RX_ENABLE | SP_INT_TX_ENABLE) |
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#define | NS16550_DISABLE_ALL_INTR 0x00 |
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#define | NS16550_ENABLE_ALL_INTR_EXCEPT_TX (SP_INT_RX_ENABLE) |
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#define | SP_IID_0 0x01 |
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#define | SP_IID_1 0x02 |
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#define | SP_IID_2 0x04 |
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#define | SP_IID_3 0x08 |
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#define | SP_FIFO_ENABLE 0x01 |
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#define | SP_FIFO_RXRST 0x02 |
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#define | SP_FIFO_TXRST 0x04 |
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#define | SP_FIFO_DMA 0x08 |
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#define | SP_FIFO_RXLEVEL 0xc0 |
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#define | SP_FIFO_SIZE 16 |
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#define | SP_LINE_SIZE 0x03 |
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#define | SP_LINE_STOP 0x04 |
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#define | SP_LINE_PAR 0x08 |
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#define | SP_LINE_ODD 0x10 |
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#define | SP_LINE_STICK 0x20 |
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#define | SP_LINE_BREAK 0x40 |
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#define | SP_LINE_DLAB 0x80 |
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#define | FIVE_BITS 0x0 /* five bits per character */ |
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#define | SIX_BITS 0x1 /* six bits per character */ |
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#define | SEVEN_BITS 0x2 /* seven bits per character */ |
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#define | EIGHT_BITS 0x3 /* eight bits per character */ |
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#define | SP_MODEM_DTR 0x01 |
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#define | SP_MODEM_RTS 0x02 |
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#define | SP_MODEM_IRQ 0x08 |
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#define | SP_MODEM_LOOP 0x10 |
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#define | SP_MODEM_DIV4 0x80 |
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#define | SP_LSR_RDY 0x01 |
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#define | SP_LSR_EOVRUN 0x02 |
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#define | SP_LSR_EPAR 0x04 |
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#define | SP_LSR_EFRAME 0x08 |
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#define | SP_LSR_BREAK 0x10 |
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#define | SP_LSR_THOLD 0x20 |
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#define | SP_LSR_TX 0x40 |
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#define | SP_LSR_EFIFO 0x80 |
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