RTEMS  5.0.0
cpuimpl.h
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1 
7 /*
8  * Copyright (c) 2013, 2016 embedded brains GmbH
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef _RTEMS_SCORE_CPUIMPL_H
16 #define _RTEMS_SCORE_CPUIMPL_H
17 
18 #include <rtems/score/cpu.h>
19 
36 #define CPU_PER_CPU_CONTROL_SIZE 0
37 
38 #ifndef ASM
39 
40 #ifdef __cplusplus
41 extern "C" {
42 #endif
43 
54 typedef struct {
55  /* CPU specific per-CPU state */
57 
65 register struct Per_CPU_Control *_CPU_Per_CPU_current asm( "rX" );
66 
74 #define _CPU_Get_current_per_CPU_control() ( _CPU_Per_CPU_current )
75 
84 #define _CPU_Get_thread_executing() ( _CPU_Per_CPU_current->executing )
85 
98 void _CPU_Context_volatile_clobber( uintptr_t pattern );
99 
115 void _CPU_Context_validate( uintptr_t pattern );
116 
123 {
124  __asm__ volatile ( ".word 0" );
125 }
126 
133 {
134  __asm__ volatile ( "nop" );
135 }
136 
137 #ifdef __cplusplus
138 }
139 #endif
140 
141 #endif /* ASM */
142 
145 #endif /* _RTEMS_SCORE_CPUIMPL_H */
#define RTEMS_INLINE_ROUTINE
Definition: basedefs.h:65
The CPU specific per-CPU control.
Definition: cpuimpl.h:54
Per CPU Core Structure.
Definition: percpu.h:290
RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation(void)
Emits a no operation instruction (nop).
Definition: cpuimpl.h:132
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
RTEMS_INLINE_ROUTINE void _CPU_Instruction_illegal(void)
Emits an illegal instruction.
Definition: cpuimpl.h:122