RTEMS  5.0.0
bsp.h
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1 
9 /*
10  * Board Support Package for CSB360 evaluation board
11  * BSP definitions
12  *
13  * Copyright 2004 Cogent Computer Systems
14  * Author: Jay Monkman <jtm@lopingdog.com>
15  *
16  * Derived from mcf5206elite BSP:
17  * Copyright (C) 2000 OKTET Ltd., St.-Petersburg, Russia
18  * Author: Victor V. Vengerov <vvv@oktet.ru>
19  *
20  * The license and distribution terms for this file may be
21  * found in the file LICENSE in this distribution or at
22  *
23  * http://www.rtems.org/license/LICENSE.
24  */
25 
26 #ifndef LIBBSP_M68K_CSB360_BSP_H
27 #define LIBBSP_M68K_CSB360_BSP_H
28 
39 #include <mcf5272/mcf5272.h>
40 
41 /*** Board resources allocation ***/
42 #define BSP_MEM_ADDR_SRAM 0x20000000
43 #define BSP_MEM_SIZE_SRAM 4096
44 
45 /* Location and size of sdram. Note this includes space used by
46  * umon.
47  */
48 #define BSP_MEM_ADDR_SDRAM 0x00000000
49 #define BSP_MEM_MASK_SDRAM 0x01ffffff
50 #define BSP_MEM_SIZE_SDRAM (32 * 1024 * 1024)
51 
52 /* Address to put SIM Modules */
53 #define BSP_MBAR 0x10000000
54 
55 /* Address to put SRAM */
56 #define BSP_RAMBAR BSP_MEM_ADDR_SRAM
57 
58 /* Interrupt Vectors */
59 #define BSP_INTVEC_INT1 65
60 #define BSP_INTVEC_INT2 66
61 #define BSP_INTVEC_INT3 67
62 #define BSP_INTVEC_INT4 68
63 #define BSP_INTVEC_TMR0 69
64 #define BSP_INTVEC_TMR1 70
65 #define BSP_INTVEC_TMR2 71
66 #define BSP_INTVEC_TMR3 72
67 #define BSP_INTVEC_UART1 73
68 #define BSP_INTVEC_UART2 74
69 #define BSP_INTVEC_PLIP 75
70 #define BSP_INTVEC_PLIA 76
71 #define BSP_INTVEC_USB0 77
72 #define BSP_INTVEC_USB1 78
73 #define BSP_INTVEC_USB2 79
74 #define BSP_INTVEC_USB3 80
75 #define BSP_INTVEC_USB4 81
76 #define BSP_INTVEC_USB5 82
77 #define BSP_INTVEC_USB6 83
78 #define BSP_INTVEC_USB7 84
79 #define BSP_INTVEC_DMA 85
80 #define BSP_INTVEC_ERX 86
81 #define BSP_INTVEC_ETX 87
82 #define BSP_INTVEC_ENTC 88
83 #define BSP_INTVEC_QSPI 89
84 #define BSP_INTVEC_INT5 90
85 #define BSP_INTVEC_INT6 91
86 #define BSP_INTVEC_SWTO 92
87 
88 #define BSP_INTLVL_INT1 1
89 #define BSP_INTLVL_INT2 1
90 #define BSP_INTLVL_INT3 1
91 #define BSP_INTLVL_INT4 1
92 #define BSP_INTLVL_TMR0 1
93 #define BSP_INTLVL_TMR1 1
94 #define BSP_INTLVL_TMR2 1
95 #define BSP_INTLVL_TMR3 1
96 #define BSP_INTLVL_UART1 1
97 #define BSP_INTLVL_UART2 1
98 #define BSP_INTLVL_PLIP 1
99 #define BSP_INTLVL_PLIA 1
100 #define BSP_INTLVL_USB0 1
101 #define BSP_INTLVL_USB1 1
102 #define BSP_INTLVL_USB2 1
103 #define BSP_INTLVL_USB3 1
104 #define BSP_INTLVL_USB4 1
105 #define BSP_INTLVL_USB5 1
106 #define BSP_INTLVL_USB6 1
107 #define BSP_INTLVL_USB7 1
108 #define BSP_INTLVL_DMA 1
109 #define BSP_INTLVL_ERX 1
110 #define BSP_INTLVL_ETX 1
111 #define BSP_INTLVL_ENTC 1
112 #define BSP_INTLVL_QSPI 1
113 #define BSP_INTLVL_INT5 1
114 #define BSP_INTLVL_INT6 1
115 #define BSP_INTLVL_SWTO 1
116 
117 
118 
119 #ifndef ASM
120 
121 #include <bspopts.h>
122 #include <rtems.h>
124 
125 #ifdef __cplusplus
126 extern "C" {
127 #endif
128 
129 struct rtems_bsdnet_ifconfig;
130 extern int rtems_enet_driver_attach (struct rtems_bsdnet_ifconfig *config);
131 #define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
132 #define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_enet_driver_attach
133 
134 /* System frequency */
135 #define BSP_SYSTEM_FREQUENCY (66 * 1000 * 1000)
136 
137 /*
138  * Simple spin delay in microsecond units for device drivers.
139  * This is very dependent on the clock speed of the target.
140  */
141 
142 #define rtems_bsp_delay( microseconds ) \
143  { register uint32_t _delay=(microseconds); \
144  register uint32_t _tmp=123; \
145  __asm__ volatile( "0: \
146  nbcd %0 ; \
147  nbcd %0 ; \
148  dbf %1,0b" \
149  : "=d" (_tmp), "=d" (_delay) \
150  : "0" (_tmp), "1" (_delay) ); \
151  }
152 
153 /*
154  * Real-Time Clock Driver Table Entry
155  * NOTE: put this entry to the device driver table AFTER I2C bus driver!
156  */
157 #define RTC_DRIVER_TABLE_ENTRY \
158  { rtc_initialize, NULL, NULL, NULL, NULL, NULL }
160  rtems_device_major_number major,
161  rtems_device_minor_number minor,
162  void *arg
163 );
164 
165 /* miscellaneous stuff assumed to exist */
166 
167 extern rtems_isr_entry M68Kvec[]; /* vector table address */
168 
169 extern rtems_isr (*rtems_clock_hook)(rtems_vector_number);
170 
171 /* functions */
172 
173 rtems_isr_entry set_vector(
174  rtems_isr_entry handler,
175  rtems_vector_number vector,
176  int type
177 );
178 
179 /*
180  * Prototypes for BSP methods which cross file boundaries
181  */
182 void init5272(void);
183 
184 #ifdef __cplusplus
185 }
186 #endif
187 
188 #endif /* ASM */
189 
192 #endif
Definition: deflate.c:115
rtems_isr_entry set_vector(rtems_isr_entry handler, rtems_vector_number vector, int type)
Install an interrupt handler.
Definition: setvec.c:28
DEFAULT_INITIAL_EXTENSION Support.
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
ISR_Handler rtems_isr
Return type for interrupt handler.
Definition: intr.h:52
rtems_status_code
Classic API Status.
Definition: status.h:43
rtems_device_driver rtc_initialize(rtems_device_major_number major, rtems_device_minor_number minor_arg, void *arg)
Definition: rtc.c:160