RTEMS  5.0.0
lpc22xx_uart.h
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1 
7 #ifndef LPC22XX_UART_H
8 #define LPC22XX_UART_H
9 
17 #define FIFODEEP 16
18 
19 #define BD115200 115200
20 #define BD38400 38400
21 #define BD9600 9600
22 
24 #define U0_PINSEL (0x00000005)
25 
26 #define U0_PINMASK (0x0000000F)
27 
28 #define U1_PINSEL (0x00050000)
29 
30 #define U1_PINMASK (0x000F0000)
31 
37 #define LCR_WORDLENTH_BIT 0
38 #define LCR_STOPBITSEL_BIT 2
39 #define LCR_PARITYENBALE_BIT 3
40 #define LCR_PARITYSEL_BIT 4
41 #define LCR_BREAKCONTROL_BIT 6
42 #define LCR_DLAB_BIT 7
43 
52 #define ULCR_CHAR_5 (0 << 0)
53 
54 #define ULCR_CHAR_6 (1 << 0)
55 
56 #define ULCR_CHAR_7 (2 << 0)
57 
58 #define ULCR_CHAR_8 (3 << 0)
59 
60 #define ULCR_STOP_0 (0 << 2)
61 
62 #define ULCR_STOP_1 (1 << 2)
63 
64 #define ULCR_PAR_NO (0 << 3)
65 
66 #define ULCR_PAR_ODD (1 << 3)
67 
68 #define ULCR_PAR_EVEN (3 << 3)
69 
70 #define ULCR_PAR_MARK (5 << 3)
71 
72 #define ULCR_PAR_SPACE (7 << 3)
73 
74 #define ULCR_BREAK_ENABLE (1 << 6)
75 
76 #define ULCR_DLAB_ENABLE (1 << 7)
77 
86 #define UMCR_DTR (1 << 0)
87 
88 #define UMCR_RTS (1 << 1)
89 
90 #define UMCR_LB (1 << 4)
91 
100 #define ULSR_RDR (1 << 0)
101 
102 #define ULSR_OE (1 << 1)
103 
104 #define ULSR_PE (1 << 2)
105 
106 #define ULSR_FE (1 << 3)
107 
108 #define ULSR_BI (1 << 4)
109 
110 #define ULSR_THRE (1 << 5)
111 
112 #define ULSR_TEMT (1 << 6)
113 
114 #define ULSR_RXFE (1 << 7)
115 #define ULSR_ERR_MASK 0x1E
116 
125 #define UMSR_DCTS (1 << 0)
126 
127 #define UMSR_DDSR (1 << 1)
128 
129 #define UMSR_TERI (1 << 2)
130 
131 #define UMSR_DDCD (1 << 3)
132 
133 #define UMSR_CTS (1 << 4)
134 
135 #define UMSR_DSR (1 << 5)
136 
137 #define UMSR_RI (1 << 6)
138 
139 #define UMSR_DCD (1 << 7)
140 
148 #define IIR_RSL 0x3
149 #define IIR_RDA 0x2
150 #define IIR_CTI 0x6
151 #define IIR_THRE 0x1
152 
160 #define IER_RBR 0x1
161 #define IER_THRE 0x2
162 #define IER_RLS 0x4
163 
171 #define RC_FIFO_OVERRUN_ERR 0x1
172 #define RC_OVERRUN_ERR 0x2
173 #define RC_PARITY_ERR 0x4
174 #define RC_FRAMING_ERR 0x8
175 #define RC_BREAK_IND 0x10
176 
179 typedef enum {
180  UART0 = 0,
181  UART1
182 } LPC_UartChanel_t;
183 
186 #endif
187 
#define UART1
(UART1 ) Base Address
Definition: same70j19.h:533
#define UART0
(UART0 ) Base Address
Definition: same70j19.h:531