RTEMS  5.0.0
cpustdatomic.h
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1 
7 /*
8  * COPYRIGHT (c) 2013 Deng Hengyi.
9  * Copyright (c) 2015 embedded brains GmbH.
10  *
11  * The license and distribution terms for this file may be
12  * found in the file LICENSE in this distribution or at
13  * http://www.rtems.org/license/LICENSE.
14  */
15 
16 #ifndef _RTEMS_SCORE_CPUSTDATOMIC_H
17 #define _RTEMS_SCORE_CPUSTDATOMIC_H
18 
19 #include <rtems/score/basedefs.h>
20 
21 #ifdef RTEMS_SMP
22  #if defined(__cplusplus) \
23  && (__GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9))
24  /*
25  * The GCC 4.9 ships its own <stdatomic.h> which is not C++ compatible. The
26  * suggested solution was to include <atomic> in case C++ is used. This works
27  * at least with GCC 4.9. See also:
28  *
29  * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60932
30  * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=60940
31  */
32  #include <atomic>
33  #define _RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC
34  #else
35  #include <stdatomic.h>
36  #define _RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC
37  #endif
38 #else
39  #include <rtems/score/isrlevel.h>
40 #endif
41 
42 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
43 
44 typedef std::atomic_uint CPU_atomic_Uint;
45 
46 typedef std::atomic_ulong CPU_atomic_Ulong;
47 
48 typedef std::atomic_uintptr_t CPU_atomic_Uintptr;
49 
50 typedef std::atomic_flag CPU_atomic_Flag;
51 
52 typedef std::memory_order CPU_atomic_Order;
53 
54 #define CPU_ATOMIC_ORDER_RELAXED std::memory_order_relaxed
55 
56 #define CPU_ATOMIC_ORDER_ACQUIRE std::memory_order_acquire
57 
58 #define CPU_ATOMIC_ORDER_RELEASE std::memory_order_release
59 
60 #define CPU_ATOMIC_ORDER_ACQ_REL std::memory_order_acq_rel
61 
62 #define CPU_ATOMIC_ORDER_SEQ_CST std::memory_order_seq_cst
63 
64 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
65 
66 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
67 
68 #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value )
69 
70 #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
71 
72 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
73 
74 typedef atomic_uint CPU_atomic_Uint;
75 
76 typedef atomic_ulong CPU_atomic_Ulong;
77 
78 typedef atomic_uintptr_t CPU_atomic_Uintptr;
79 
80 typedef atomic_flag CPU_atomic_Flag;
81 
82 typedef memory_order CPU_atomic_Order;
83 
84 #define CPU_ATOMIC_ORDER_RELAXED memory_order_relaxed
85 
86 #define CPU_ATOMIC_ORDER_ACQUIRE memory_order_acquire
87 
88 #define CPU_ATOMIC_ORDER_RELEASE memory_order_release
89 
90 #define CPU_ATOMIC_ORDER_ACQ_REL memory_order_acq_rel
91 
92 #define CPU_ATOMIC_ORDER_SEQ_CST memory_order_seq_cst
93 
94 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ATOMIC_VAR_INIT( value )
95 
96 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ATOMIC_VAR_INIT( value )
97 
98 #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ATOMIC_VAR_INIT( value )
99 
100 #define CPU_ATOMIC_INITIALIZER_FLAG ATOMIC_FLAG_INIT
101 
102 #else
103 
104 typedef unsigned int CPU_atomic_Uint;
105 
106 typedef unsigned long CPU_atomic_Ulong;
107 
108 typedef uintptr_t CPU_atomic_Uintptr;
109 
110 typedef bool CPU_atomic_Flag;
111 
112 typedef int CPU_atomic_Order;
113 
114 #define CPU_ATOMIC_ORDER_RELAXED 0
115 
116 #define CPU_ATOMIC_ORDER_ACQUIRE 2
117 
118 #define CPU_ATOMIC_ORDER_RELEASE 3
119 
120 #define CPU_ATOMIC_ORDER_ACQ_REL 4
121 
122 #define CPU_ATOMIC_ORDER_SEQ_CST 5
123 
124 #define CPU_ATOMIC_INITIALIZER_UINT( value ) ( value )
125 
126 #define CPU_ATOMIC_INITIALIZER_ULONG( value ) ( value )
127 
128 #define CPU_ATOMIC_INITIALIZER_UINTPTR( value ) ( value )
129 
130 #define CPU_ATOMIC_INITIALIZER_FLAG false
131 
132 #endif
133 
134 static inline void _CPU_atomic_Fence( CPU_atomic_Order order )
135 {
136 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
137  std::atomic_thread_fence( order );
138 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
139  atomic_thread_fence( order );
140 #else
141  (void) order;
142  RTEMS_COMPILER_MEMORY_BARRIER();
143 #endif
144 }
145 
146 static inline void _CPU_atomic_Init_uint( CPU_atomic_Uint *obj, unsigned int desired )
147 {
148 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
149  obj->store( desired );
150 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
151  atomic_init( obj, desired );
152 #else
153  *obj = desired;
154 #endif
155 }
156 
157 static inline void _CPU_atomic_Init_ulong( CPU_atomic_Ulong *obj, unsigned long desired )
158 {
159 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
160  obj->store( desired );
161 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
162  atomic_init( obj, desired );
163 #else
164  *obj = desired;
165 #endif
166 }
167 
168 static inline void _CPU_atomic_Init_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired )
169 {
170 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
171  obj->store( desired );
172 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
173  atomic_init( obj, desired );
174 #else
175  *obj = desired;
176 #endif
177 }
178 
179 static inline unsigned int _CPU_atomic_Load_uint( const CPU_atomic_Uint *obj, CPU_atomic_Order order )
180 {
181 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
182  return obj->load( order );
183 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
184  return atomic_load_explicit( obj, order );
185 #else
186  unsigned int val;
187 
188  (void) order;
189  val = *obj;
190  RTEMS_COMPILER_MEMORY_BARRIER();
191 
192  return val;
193 #endif
194 }
195 
196 static inline unsigned long _CPU_atomic_Load_ulong( const CPU_atomic_Ulong *obj, CPU_atomic_Order order )
197 {
198 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
199  return obj->load( order );
200 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
201  return atomic_load_explicit( obj, order );
202 #else
203  unsigned long val;
204 
205  (void) order;
206  val = *obj;
207  RTEMS_COMPILER_MEMORY_BARRIER();
208 
209  return val;
210 #endif
211 }
212 
213 static inline uintptr_t _CPU_atomic_Load_uintptr( const CPU_atomic_Uintptr *obj, CPU_atomic_Order order )
214 {
215 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
216  return obj->load( order );
217 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
218  return atomic_load_explicit( obj, order );
219 #else
220  uintptr_t val;
221 
222  (void) order;
223  val = *obj;
224  RTEMS_COMPILER_MEMORY_BARRIER();
225 
226  return val;
227 #endif
228 }
229 
230 static inline void _CPU_atomic_Store_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
231 {
232 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
233  obj->store( desired );
234 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
235  atomic_store_explicit( obj, desired, order );
236 #else
237  (void) order;
238  RTEMS_COMPILER_MEMORY_BARRIER();
239  *obj = desired;
240 #endif
241 }
242 
243 static inline void _CPU_atomic_Store_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
244 {
245 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
246  obj->store( desired );
247 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
248  atomic_store_explicit( obj, desired, order );
249 #else
250  (void) order;
251  RTEMS_COMPILER_MEMORY_BARRIER();
252  *obj = desired;
253 #endif
254 }
255 
256 static inline void _CPU_atomic_Store_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order )
257 {
258 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
259  obj->store( desired );
260 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
261  atomic_store_explicit( obj, desired, order );
262 #else
263  (void) order;
264  RTEMS_COMPILER_MEMORY_BARRIER();
265  *obj = desired;
266 #endif
267 }
268 
269 static inline unsigned int _CPU_atomic_Fetch_add_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
270 {
271 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
272  return obj->fetch_add( arg, order );
273 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
274  return atomic_fetch_add_explicit( obj, arg, order );
275 #else
276  unsigned int val;
277  ISR_Level level;
278 
279  (void) order;
280  _ISR_Local_disable( level );
281  val = *obj;
282  *obj = val + arg;
283  _ISR_Local_enable( level );
284 
285  return val;
286 #endif
287 }
288 
289 static inline unsigned long _CPU_atomic_Fetch_add_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
290 {
291 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
292  return obj->fetch_add( arg, order );
293 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
294  return atomic_fetch_add_explicit( obj, arg, order );
295 #else
296  unsigned long val;
297  ISR_Level level;
298 
299  (void) order;
300  _ISR_Local_disable( level );
301  val = *obj;
302  *obj = val + arg;
303  _ISR_Local_enable( level );
304 
305  return val;
306 #endif
307 }
308 
309 static inline uintptr_t _CPU_atomic_Fetch_add_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order )
310 {
311 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
312  return obj->fetch_add( arg, order );
313 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
314  return atomic_fetch_add_explicit( obj, arg, order );
315 #else
316  uintptr_t val;
317  ISR_Level level;
318 
319  (void) order;
320  _ISR_Local_disable( level );
321  val = *obj;
322  *obj = val + arg;
323  _ISR_Local_enable( level );
324 
325  return val;
326 #endif
327 }
328 
329 static inline unsigned int _CPU_atomic_Fetch_sub_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
330 {
331 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
332  return obj->fetch_sub( arg, order );
333 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
334  return atomic_fetch_sub_explicit( obj, arg, order );
335 #else
336  unsigned int val;
337  ISR_Level level;
338 
339  (void) order;
340  _ISR_Local_disable( level );
341  val = *obj;
342  *obj = val - arg;
343  _ISR_Local_enable( level );
344 
345  return val;
346 #endif
347 }
348 
349 static inline unsigned long _CPU_atomic_Fetch_sub_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
350 {
351 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
352  return obj->fetch_sub( arg, order );
353 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
354  return atomic_fetch_sub_explicit( obj, arg, order );
355 #else
356  unsigned long val;
357  ISR_Level level;
358 
359  (void) order;
360  _ISR_Local_disable( level );
361  val = *obj;
362  *obj = val - arg;
363  _ISR_Local_enable( level );
364 
365  return val;
366 #endif
367 }
368 
369 static inline uintptr_t _CPU_atomic_Fetch_sub_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order )
370 {
371 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
372  return obj->fetch_sub( arg, order );
373 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
374  return atomic_fetch_sub_explicit( obj, arg, order );
375 #else
376  uintptr_t val;
377  ISR_Level level;
378 
379  (void) order;
380  _ISR_Local_disable( level );
381  val = *obj;
382  *obj = val - arg;
383  _ISR_Local_enable( level );
384 
385  return val;
386 #endif
387 }
388 
389 static inline unsigned int _CPU_atomic_Fetch_or_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
390 {
391 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
392  return obj->fetch_or( arg, order );
393 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
394  return atomic_fetch_or_explicit( obj, arg, order );
395 #else
396  unsigned int val;
397  ISR_Level level;
398 
399  (void) order;
400  _ISR_Local_disable( level );
401  val = *obj;
402  *obj = val | arg;
403  _ISR_Local_enable( level );
404 
405  return val;
406 #endif
407 }
408 
409 static inline unsigned long _CPU_atomic_Fetch_or_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
410 {
411 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
412  return obj->fetch_or( arg, order );
413 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
414  return atomic_fetch_or_explicit( obj, arg, order );
415 #else
416  unsigned long val;
417  ISR_Level level;
418 
419  (void) order;
420  _ISR_Local_disable( level );
421  val = *obj;
422  *obj = val | arg;
423  _ISR_Local_enable( level );
424 
425  return val;
426 #endif
427 }
428 
429 static inline uintptr_t _CPU_atomic_Fetch_or_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order )
430 {
431 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
432  return obj->fetch_or( arg, order );
433 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
434  return atomic_fetch_or_explicit( obj, arg, order );
435 #else
436  uintptr_t val;
437  ISR_Level level;
438 
439  (void) order;
440  _ISR_Local_disable( level );
441  val = *obj;
442  *obj = val | arg;
443  _ISR_Local_enable( level );
444 
445  return val;
446 #endif
447 }
448 
449 static inline unsigned int _CPU_atomic_Fetch_and_uint( CPU_atomic_Uint *obj, unsigned int arg, CPU_atomic_Order order )
450 {
451 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
452  return obj->fetch_and( arg, order );
453 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
454  return atomic_fetch_and_explicit( obj, arg, order );
455 #else
456  unsigned int val;
457  ISR_Level level;
458 
459  (void) order;
460  _ISR_Local_disable( level );
461  val = *obj;
462  *obj = val & arg;
463  _ISR_Local_enable( level );
464 
465  return val;
466 #endif
467 }
468 
469 static inline unsigned long _CPU_atomic_Fetch_and_ulong( CPU_atomic_Ulong *obj, unsigned long arg, CPU_atomic_Order order )
470 {
471 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
472  return obj->fetch_and( arg, order );
473 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
474  return atomic_fetch_and_explicit( obj, arg, order );
475 #else
476  unsigned long val;
477  ISR_Level level;
478 
479  (void) order;
480  _ISR_Local_disable( level );
481  val = *obj;
482  *obj = val & arg;
483  _ISR_Local_enable( level );
484 
485  return val;
486 #endif
487 }
488 
489 static inline uintptr_t _CPU_atomic_Fetch_and_uintptr( CPU_atomic_Uintptr *obj, uintptr_t arg, CPU_atomic_Order order )
490 {
491 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
492  return obj->fetch_and( arg, order );
493 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
494  return atomic_fetch_and_explicit( obj, arg, order );
495 #else
496  uintptr_t val;
497  ISR_Level level;
498 
499  (void) order;
500  _ISR_Local_disable( level );
501  val = *obj;
502  *obj = val & arg;
503  _ISR_Local_enable( level );
504 
505  return val;
506 #endif
507 }
508 
509 static inline unsigned int _CPU_atomic_Exchange_uint( CPU_atomic_Uint *obj, unsigned int desired, CPU_atomic_Order order )
510 {
511 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
512  return obj->exchange( desired, order );
513 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
514  return atomic_exchange_explicit( obj, desired, order );
515 #else
516  unsigned int val;
517  ISR_Level level;
518 
519  (void) order;
520  _ISR_Local_disable( level );
521  val = *obj;
522  *obj = desired;
523  _ISR_Local_enable( level );
524 
525  return val;
526 #endif
527 }
528 
529 static inline unsigned long _CPU_atomic_Exchange_ulong( CPU_atomic_Ulong *obj, unsigned long desired, CPU_atomic_Order order )
530 {
531 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
532  return obj->exchange( desired, order );
533 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
534  return atomic_exchange_explicit( obj, desired, order );
535 #else
536  unsigned long val;
537  ISR_Level level;
538 
539  (void) order;
540  _ISR_Local_disable( level );
541  val = *obj;
542  *obj = desired;
543  _ISR_Local_enable( level );
544 
545  return val;
546 #endif
547 }
548 
549 static inline uintptr_t _CPU_atomic_Exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t desired, CPU_atomic_Order order )
550 {
551 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
552  return obj->exchange( desired, order );
553 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
554  return atomic_exchange_explicit( obj, desired, order );
555 #else
556  uintptr_t val;
557  ISR_Level level;
558 
559  (void) order;
560  _ISR_Local_disable( level );
561  val = *obj;
562  *obj = desired;
563  _ISR_Local_enable( level );
564 
565  return val;
566 #endif
567 }
568 
569 static inline bool _CPU_atomic_Compare_exchange_uint( CPU_atomic_Uint *obj, unsigned int *expected, unsigned int desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
570 {
571 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
572  return obj->compare_exchange_strong( *expected, desired, succ, fail );
573 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
574  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
575 #else
576  bool success;
577  ISR_Level level;
578  unsigned int actual;
579 
580  (void) succ;
581  (void) fail;
582  _ISR_Local_disable( level );
583  actual = *obj;
584  success = ( actual == *expected );
585  if ( success ) {
586  *obj = desired;
587  } else {
588  *expected = actual;
589  }
590  _ISR_Local_enable( level );
591 
592  return success;
593 #endif
594 }
595 
596 static inline bool _CPU_atomic_Compare_exchange_ulong( CPU_atomic_Ulong *obj, unsigned long *expected, unsigned long desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
597 {
598 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
599  return obj->compare_exchange_strong( *expected, desired, succ, fail );
600 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
601  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
602 #else
603  bool success;
604  ISR_Level level;
605  unsigned long actual;
606 
607  (void) succ;
608  (void) fail;
609  _ISR_Local_disable( level );
610  actual = *obj;
611  success = ( actual == *expected );
612  if ( success ) {
613  *obj = desired;
614  } else {
615  *expected = actual;
616  }
617  _ISR_Local_enable( level );
618 
619  return success;
620 #endif
621 }
622 
623 static inline bool _CPU_atomic_Compare_exchange_uintptr( CPU_atomic_Uintptr *obj, uintptr_t *expected, uintptr_t desired, CPU_atomic_Order succ, CPU_atomic_Order fail )
624 {
625 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
626  return obj->compare_exchange_strong( *expected, desired, succ, fail );
627 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
628  return atomic_compare_exchange_strong_explicit( obj, expected, desired, succ, fail );
629 #else
630  bool success;
631  ISR_Level level;
632  uintptr_t actual;
633 
634  (void) succ;
635  (void) fail;
636  _ISR_Local_disable( level );
637  actual = *obj;
638  success = ( actual == *expected );
639  if ( success ) {
640  *obj = desired;
641  } else {
642  *expected = actual;
643  }
644  _ISR_Local_enable( level );
645 
646  return success;
647 #endif
648 }
649 
650 static inline void _CPU_atomic_Flag_clear( CPU_atomic_Flag *obj, CPU_atomic_Order order )
651 {
652 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
653  obj->clear( order );
654 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
655  atomic_flag_clear_explicit( obj, order );
656 #else
657  (void) order;
658  *obj = false;
659 #endif
660 }
661 
662 static inline bool _CPU_atomic_Flag_test_and_set( CPU_atomic_Flag *obj, CPU_atomic_Order order )
663 {
664 #if defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_ATOMIC)
665  return obj->test_and_set( order );
666 #elif defined(_RTEMS_SCORE_CPUSTDATOMIC_USE_STDATOMIC)
667  return atomic_flag_test_and_set_explicit( obj, order );
668 #else
669  bool flag;
670  ISR_Level level;
671 
672  (void) order;
673  _ISR_Local_disable( level );
674  flag = *obj;
675  *obj = true;
676  _ISR_Local_enable( level );
677 
678  return flag;
679 #endif
680 }
681 
682 #endif /* _RTEMS_SCORE_CPUSTDATOMIC_H */
isrlevel.h
ISR Level Type.
_ISR_Local_disable
#define _ISR_Local_disable(_level)
Disables interrupts on this processor.
Definition: isrlevel.h:54
ISR_Level
uint32_t ISR_Level
Definition: isrlevel.h:38
_ISR_Local_enable
#define _ISR_Local_enable(_level)
Enables interrupts on this processor.
Definition: isrlevel.h:71
basedefs.h
Basic Definitions.
RTEMS_COMPILER_MEMORY_BARRIER
#define RTEMS_COMPILER_MEMORY_BARRIER()
Definition: basedefs.h:76
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