RTEMS  5.0.0
pci.h
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1 
7 /*
8  * Copyright 1994, Drew Eckhardt
9  * Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
10  *
11  * For more information, please consult the following manuals (look at
12  * http://www.pcisig.com/ for how to get them):
13  *
14  * PCI BIOS Specification
15  * PCI Local Bus Specification
16  * PCI to PCI Bridge Specification
17  * PCI System Design Guide
18  */
19 
20 #ifndef _RTEMS_PCI_H
21 #define _RTEMS_PCI_H
22 
23 #include <stdint.h>
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
29 /*
30  * Under PCI, each device has 256 bytes of configuration address space,
31  * of which the first 64 bytes are standardized as follows:
32  */
33 #define PCI_VENDOR_ID 0x00 /* 16 bits */
34 #define PCI_DEVICE_ID 0x02 /* 16 bits */
35 
36 #define PCI_INVALID_VENDORDEVICEID 0xffffffff
37 
38 #define PCI_COMMAND 0x04 /* 16 bits */
39 #define PCI_COMMAND_IO 0x0001 /* Enable response in I/O space */
40 #define PCI_COMMAND_MEMORY 0x0002 /* Enable response in Memory space */
41 #define PCI_COMMAND_MASTER 0x0004 /* Enable bus mastering */
42 #define PCI_COMMAND_SPECIAL 0x0008 /* Enable response to special cycles */
43 #define PCI_COMMAND_INVALIDATE 0x0010 /* Use memory write and invalidate */
44 #define PCI_COMMAND_VGA_PALETTE 0x0020 /* Enable palette snooping */
45 #define PCI_COMMAND_PARITY 0x0040 /* Enable parity checking */
46 #define PCI_COMMAND_WAIT 0x0080 /* Enable address/data stepping */
47 #define PCI_COMMAND_SERR 0x0100 /* Enable SERR */
48 #define PCI_COMMAND_FAST_BACK 0x0200 /* Enable back-to-back writes */
49 #define PCI_COMMAND_INTX_DISABLE 0x0400 /* Disable INTx emulation */
50 
51 #define PCI_STATUS 0x06 /* 16 bits */
52 #define PCI_STATUS_66MHZ 0x0020 /* Support 66 Mhz PCI 2.1 bus */
53 #define PCI_STATUS_UDF 0x0040 /* Support User Definable Features */
54 #define PCI_STATUS_FAST_BACK 0x0080 /* Accept fast-back to back */
55 #define PCI_STATUS_PARITY 0x0100 /* Detected parity error */
56 #define PCI_STATUS_DEVSEL_MASK 0x0600 /* DEVSEL timing */
57 #define PCI_STATUS_DEVSEL_FAST 0x0000
58 #define PCI_STATUS_DEVSEL_MEDIUM 0x0200
59 #define PCI_STATUS_DEVSEL_SLOW 0x0400
60 #define PCI_STATUS_SIG_TARGET_ABORT 0x0800 /* Set on target abort */
61 #define PCI_STATUS_REC_TARGET_ABORT 0x1000 /* Master ack of " */
62 #define PCI_STATUS_REC_MASTER_ABORT 0x2000 /* Set on master abort */
63 #define PCI_STATUS_SIG_SYSTEM_ERROR 0x4000 /* Set when we drive SERR */
64 #define PCI_STATUS_DETECTED_PARITY 0x8000 /* Set on parity error */
65 
66 #define PCI_CLASS_REVISION 0x08 /* High 24 bits are class, low 8 revision */
67 #define PCI_REVISION_ID 0x08 /* Revision ID */
68 #define PCI_CLASS_PROG 0x09 /* Reg. Level Programming Interface */
69 #define PCI_CLASS_DEVICE 0x0a /* Device class */
70 #define PCI_CACHE_LINE_SIZE 0x0c /* 8 bits */
71 #define PCI_LATENCY_TIMER 0x0d /* 8 bits */
72 
73 #define PCI_HEADER_TYPE 0x0e /* 8 bits */
74 #define PCI_HEADER_TYPE_NORMAL 0x00
75 #define PCI_HEADER_TYPE_BRIDGE 0x01
76 #define PCI_HEADER_TYPE_CARDBUS 0x02
77 #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80
78 
79 #define PCI_BIST 0x0f /* 8 bits */
80 #define PCI_BIST_CODE_MASK 0x0f /* Return result */
81 #define PCI_BIST_START 0x40 /* 1 to start BIST, 2 secs or less */
82 #define PCI_BIST_CAPABLE 0x80 /* 1 if BIST capable */
83 
84 /*
85  * Base addresses specify locations in memory or I/O space.
86  * Decoded size can be determined by writing a value of
87  * 0xffffffff to the register, and reading it back. Only
88  * 1 bits are decoded.
89  */
90 #define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
91 #define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
92 #define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
93 #define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
94 #define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
95 #define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
96 #define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
97 #define PCI_BASE_ADDRESS_SPACE_IO 0x01
98 #define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
99 #define PCI_BASE_ADDRESS_MEM_TYPE_MASK 0x06
100 #define PCI_BASE_ADDRESS_MEM_TYPE_32 0x00 /* 32 bit address */
101 #define PCI_BASE_ADDRESS_MEM_TYPE_1M 0x02 /* Below 1M */
102 #define PCI_BASE_ADDRESS_MEM_TYPE_64 0x04 /* 64 bit address */
103 #define PCI_BASE_ADDRESS_MEM_PREFETCH 0x08 /* prefetchable? */
104 #define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
105 #define PCI_BASE_ADDRESS_IO_MASK (~0x03UL)
106 /* bit 1 is reserved if address_space = 1 */
107 
108 /* Header type 0 (normal devices) */
109 #define PCI_CARDBUS_CIS 0x28
110 #define PCI_SUBSYSTEM_VENDOR_ID 0x2c
111 #define PCI_SUBSYSTEM_ID 0x2e
112 #define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 address, 10..1 reserved */
113 #define PCI_ROM_ADDRESS_ENABLE 0x01
114 #define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
115 
116 /* upper 24 bits are reserved */
117 #define PCI_CAPABILITY_LIST_POINTER 0x34
118 
119 /* 0x38-0x3b are reserved */
120 #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */
121 #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */
122 #define PCI_MIN_GNT 0x3e /* 8 bits */
123 #define PCI_MAX_LAT 0x3f /* 8 bits */
124 
125 /* Header type 1 (PCI-to-PCI bridges) */
126 #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */
127 #define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */
128 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */
129 #define PCI_SEC_LATENCY_TIMER 0x1b /* Latency timer for secondary interface */
130 #define PCI_IO_BASE 0x1c /* I/O range behind the bridge */
131 #define PCI_IO_LIMIT 0x1d
132 #define PCI_IO_RANGE_TYPE_MASK 0x0f /* I/O bridging type */
133 #define PCI_IO_RANGE_TYPE_16 0x00
134 #define PCI_IO_RANGE_TYPE_32 0x01
135 #define PCI_IO_RANGE_MASK ~0x0f
136 
137 #define PCI_SEC_STATUS 0x1e /* Secondary status register, only bit 14 used */
138 
139 #define PCI_MEMORY_BASE 0x20 /* Memory range behind */
140 #define PCI_MEMORY_LIMIT 0x22
141 #define PCI_MEMORY_RANGE_TYPE_MASK 0x0f
142 #define PCI_MEMORY_RANGE_MASK ~0x0f
143 #define PCI_PREF_MEMORY_BASE 0x24 /* Prefetchable memory range behind */
144 #define PCI_PREF_MEMORY_LIMIT 0x26
145 #define PCI_PREF_RANGE_TYPE_MASK 0x0f
146 #define PCI_PREF_RANGE_TYPE_32 0x00
147 #define PCI_PREF_RANGE_TYPE_64 0x01
148 #define PCI_PREF_RANGE_MASK ~0x0f
149 #define PCI_PREF_BASE_UPPER32 0x28 /* Upper half of prefetchable memory */
150 #define PCI_PREF_LIMIT_UPPER32 0x2c
151 #define PCI_IO_BASE_UPPER16 0x30 /* Upper half of I/O addresses */
152 #define PCI_IO_LIMIT_UPPER16 0x32
153 /* 0x34-0x3b is reserved */
154 #define PCI_ROM_ADDRESS1 0x38 /* Same as PCI_ROM_ADDRESS, but for htype 1 */
155 /* 0x3c-0x3d are same as for htype 0 */
156 #define PCI_BRIDGE_CONTROL 0x3e
157 #define PCI_BRIDGE_CTL_PARITY 0x01 /* Enable parity detection on secondary interface */
158 #define PCI_BRIDGE_CTL_SERR 0x02 /* The same for SERR forwarding */
159 #define PCI_BRIDGE_CTL_NO_ISA 0x04 /* Disable bridging of ISA ports */
160 #define PCI_BRIDGE_CTL_VGA 0x08 /* Forward VGA addresses */
161 #define PCI_BRIDGE_CTL_MASTER_ABORT 0x20 /* Report master aborts */
162 #define PCI_BRIDGE_CTL_BUS_RESET 0x40 /* Secondary bus reset */
163 #define PCI_BRIDGE_CTL_FAST_BACK 0x80 /* Fast Back2Back enabled */
164  /* on secondary interface */
165 
166 /* Header type 2 (CardBus bridges) */
167 /* 0x14-0x15 reserved */
168 #define PCI_CB_SEC_STATUS 0x16 /* Secondary status */
169 #define PCI_CB_PRIMARY_BUS 0x18 /* PCI bus number */
170 #define PCI_CB_CARD_BUS 0x19 /* CardBus bus number */
171 #define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
172 #define PCI_CB_LATENCY_TIMER 0x1b /* CardBus latency timer */
173 #define PCI_CB_MEMORY_BASE_0 0x1c
174 #define PCI_CB_MEMORY_LIMIT_0 0x20
175 #define PCI_CB_MEMORY_BASE_1 0x24
176 #define PCI_CB_MEMORY_LIMIT_1 0x28
177 #define PCI_CB_IO_BASE_0 0x2c
178 #define PCI_CB_IO_BASE_0_HI 0x2e
179 #define PCI_CB_IO_LIMIT_0 0x30
180 #define PCI_CB_IO_LIMIT_0_HI 0x32
181 #define PCI_CB_IO_BASE_1 0x34
182 #define PCI_CB_IO_BASE_1_HI 0x36
183 #define PCI_CB_IO_LIMIT_1 0x38
184 #define PCI_CB_IO_LIMIT_1_HI 0x3a
185 #define PCI_CB_IO_RANGE_MASK ~0x03
186 /* 0x3c-0x3d are same as for htype 0 */
187 
188 #define PCI_CB_BRIDGE_CONTROL 0x3e
189 #define PCI_CB_BRIDGE_CTL_PARITY 0x01 /* Similar to standard bridge */
190  /* control register */
191 #define PCI_CB_BRIDGE_CTL_SERR 0x02
192 #define PCI_CB_BRIDGE_CTL_ISA 0x04
193 #define PCI_CB_BRIDGE_CTL_VGA 0x08
194 #define PCI_CB_BRIDGE_CTL_MASTER_ABORT 0x20
195 #define PCI_CB_BRIDGE_CTL_CB_RESET 0x40 /* CardBus reset */
196 #define PCI_CB_BRIDGE_CTL_16BIT_INT 0x80 /* Enable interrupt for */
197  /* 16-bit cards */
198 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM0 0x100 /* Prefetch enable for */
199  /* both memory regions */
200 #define PCI_CB_BRIDGE_CTL_PREFETCH_MEM1 0x200
201 #define PCI_CB_BRIDGE_CTL_POST_WRITES 0x400
202 
203 #define PCI_CB_SUBSYSTEM_VENDOR_ID 0x40
204 #define PCI_CB_SUBSYSTEM_ID 0x42
205 
206 /* 16-bit PC Card legacy mode base address (ExCa) */
207 #define PCI_CB_LEGACY_MODE_BASE 0x44
208 
209 /* 0x48-0x7f reserved */
210 
211 /* Device classes and subclasses */
212 
213 #define PCI_CLASS_NOT_DEFINED 0x0000
214 #define PCI_CLASS_NOT_DEFINED_VGA 0x0001
215 
216 #define PCI_BASE_CLASS_STORAGE 0x01
217 #define PCI_CLASS_STORAGE_SCSI 0x0100
218 #define PCI_CLASS_STORAGE_IDE 0x0101
219 #define PCI_CLASS_STORAGE_FLOPPY 0x0102
220 #define PCI_CLASS_STORAGE_IPI 0x0103
221 #define PCI_CLASS_STORAGE_RAID 0x0104
222 #define PCI_CLASS_STORAGE_OTHER 0x0180
223 
224 #define PCI_BASE_CLASS_NETWORK 0x02
225 #define PCI_CLASS_NETWORK_ETHERNET 0x0200
226 #define PCI_CLASS_NETWORK_TOKEN_RING 0x0201
227 #define PCI_CLASS_NETWORK_FDDI 0x0202
228 #define PCI_CLASS_NETWORK_ATM 0x0203
229 #define PCI_CLASS_NETWORK_OTHER 0x0280
230 
231 #define PCI_BASE_CLASS_DISPLAY 0x03
232 #define PCI_CLASS_DISPLAY_VGA 0x0300
233 #define PCI_CLASS_DISPLAY_XGA 0x0301
234 #define PCI_CLASS_DISPLAY_OTHER 0x0380
235 
236 #define PCI_BASE_CLASS_MULTIMEDIA 0x04
237 #define PCI_CLASS_MULTIMEDIA_VIDEO 0x0400
238 #define PCI_CLASS_MULTIMEDIA_AUDIO 0x0401
239 #define PCI_CLASS_MULTIMEDIA_OTHER 0x0480
240 
241 #define PCI_BASE_CLASS_MEMORY 0x05
242 #define PCI_CLASS_MEMORY_RAM 0x0500
243 #define PCI_CLASS_MEMORY_FLASH 0x0501
244 #define PCI_CLASS_MEMORY_OTHER 0x0580
245 
246 #define PCI_BASE_CLASS_BRIDGE 0x06
247 #define PCI_CLASS_BRIDGE_HOST 0x0600
248 #define PCI_CLASS_BRIDGE_ISA 0x0601
249 #define PCI_CLASS_BRIDGE_EISA 0x0602
250 #define PCI_CLASS_BRIDGE_MC 0x0603
251 #define PCI_CLASS_BRIDGE_PCI 0x0604
252 #define PCI_CLASS_BRIDGE_PCMCIA 0x0605
253 #define PCI_CLASS_BRIDGE_NUBUS 0x0606
254 #define PCI_CLASS_BRIDGE_CARDBUS 0x0607
255 #define PCI_CLASS_BRIDGE_OTHER 0x0680
256 
257 #define PCI_BASE_CLASS_COMMUNICATION 0x07
258 #define PCI_CLASS_COMMUNICATION_SERIAL 0x0700
259 #define PCI_CLASS_COMMUNICATION_PARALLEL 0x0701
260 #define PCI_CLASS_COMMUNICATION_OTHER 0x0780
261 
262 #define PCI_BASE_CLASS_SYSTEM 0x08
263 #define PCI_CLASS_SYSTEM_PIC 0x0800
264 #define PCI_CLASS_SYSTEM_DMA 0x0801
265 #define PCI_CLASS_SYSTEM_TIMER 0x0802
266 #define PCI_CLASS_SYSTEM_RTC 0x0803
267 #define PCI_CLASS_SYSTEM_OTHER 0x0880
268 
269 #define PCI_BASE_CLASS_INPUT 0x09
270 #define PCI_CLASS_INPUT_KEYBOARD 0x0900
271 #define PCI_CLASS_INPUT_PEN 0x0901
272 #define PCI_CLASS_INPUT_MOUSE 0x0902
273 #define PCI_CLASS_INPUT_OTHER 0x0980
274 
275 #define PCI_BASE_CLASS_DOCKING 0x0a
276 #define PCI_CLASS_DOCKING_GENERIC 0x0a00
277 #define PCI_CLASS_DOCKING_OTHER 0x0a01
278 
279 #define PCI_BASE_CLASS_PROCESSOR 0x0b
280 #define PCI_CLASS_PROCESSOR_386 0x0b00
281 #define PCI_CLASS_PROCESSOR_486 0x0b01
282 #define PCI_CLASS_PROCESSOR_PENTIUM 0x0b02
283 #define PCI_CLASS_PROCESSOR_ALPHA 0x0b10
284 #define PCI_CLASS_PROCESSOR_POWERPC 0x0b20
285 #define PCI_CLASS_PROCESSOR_CO 0x0b40
286 
287 #define PCI_BASE_CLASS_SERIAL 0x0c
288 #define PCI_CLASS_SERIAL_FIREWIRE 0x0c00
289 #define PCI_CLASS_SERIAL_ACCESS 0x0c01
290 #define PCI_CLASS_SERIAL_SSA 0x0c02
291 #define PCI_CLASS_SERIAL_USB 0x0c03
292 #define PCI_CLASS_SERIAL_FIBER 0x0c04
293 
294 #define PCI_CLASS_OTHERS 0xff
295 
296 /*
297  * Vendor and card ID's: sort these numerically according to vendor
298  * (and according to card ID within vendor). Send all updates to
299  * <linux-pcisupport@cck.uni-kl.de>.
300  */
301 #define PCI_VENDOR_ID_COMPAQ 0x0e11
302 #define PCI_DEVICE_ID_COMPAQ_1280 0x3033
303 #define PCI_DEVICE_ID_COMPAQ_TRIFLEX 0x4000
304 #define PCI_DEVICE_ID_COMPAQ_SMART2P 0xae10
305 #define PCI_DEVICE_ID_COMPAQ_NETEL100 0xae32
306 #define PCI_DEVICE_ID_COMPAQ_NETEL10 0xae34
307 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3I 0xae35
308 #define PCI_DEVICE_ID_COMPAQ_NETEL100D 0xae40
309 #define PCI_DEVICE_ID_COMPAQ_NETEL100PI 0xae43
310 #define PCI_DEVICE_ID_COMPAQ_NETEL100I 0xb011
311 #define PCI_DEVICE_ID_COMPAQ_THUNDER 0xf130
312 #define PCI_DEVICE_ID_COMPAQ_NETFLEX3B 0xf150
313 
314 #define PCI_VENDOR_ID_NCR 0x1000
315 #define PCI_DEVICE_ID_NCR_53C810 0x0001
316 #define PCI_DEVICE_ID_NCR_53C820 0x0002
317 #define PCI_DEVICE_ID_NCR_53C825 0x0003
318 #define PCI_DEVICE_ID_NCR_53C815 0x0004
319 #define PCI_DEVICE_ID_NCR_53C860 0x0006
320 #define PCI_DEVICE_ID_NCR_53C896 0x000b
321 #define PCI_DEVICE_ID_NCR_53C895 0x000c
322 #define PCI_DEVICE_ID_NCR_53C885 0x000d
323 #define PCI_DEVICE_ID_NCR_53C875 0x000f
324 #define PCI_DEVICE_ID_NCR_53C875J 0x008f
325 
326 #define PCI_VENDOR_ID_ATI 0x1002
327 #define PCI_DEVICE_ID_ATI_68800 0x4158
328 #define PCI_DEVICE_ID_ATI_215CT222 0x4354
329 #define PCI_DEVICE_ID_ATI_210888CX 0x4358
330 #define PCI_DEVICE_ID_ATI_215GB 0x4742
331 #define PCI_DEVICE_ID_ATI_215GD 0x4744
332 #define PCI_DEVICE_ID_ATI_215GI 0x4749
333 #define PCI_DEVICE_ID_ATI_215GP 0x4750
334 #define PCI_DEVICE_ID_ATI_215GQ 0x4751
335 #define PCI_DEVICE_ID_ATI_215GT 0x4754
336 #define PCI_DEVICE_ID_ATI_215GTB 0x4755
337 #define PCI_DEVICE_ID_ATI_210888GX 0x4758
338 #define PCI_DEVICE_ID_ATI_215LG 0x4c47
339 #define PCI_DEVICE_ID_ATI_264LT 0x4c54
340 #define PCI_DEVICE_ID_ATI_264VT 0x5654
341 
342 #define PCI_VENDOR_ID_VLSI 0x1004
343 #define PCI_DEVICE_ID_VLSI_82C592 0x0005
344 #define PCI_DEVICE_ID_VLSI_82C593 0x0006
345 #define PCI_DEVICE_ID_VLSI_82C594 0x0007
346 #define PCI_DEVICE_ID_VLSI_82C597 0x0009
347 #define PCI_DEVICE_ID_VLSI_82C541 0x000c
348 #define PCI_DEVICE_ID_VLSI_82C543 0x000d
349 #define PCI_DEVICE_ID_VLSI_82C532 0x0101
350 #define PCI_DEVICE_ID_VLSI_82C534 0x0102
351 #define PCI_DEVICE_ID_VLSI_82C535 0x0104
352 #define PCI_DEVICE_ID_VLSI_82C147 0x0105
353 #define PCI_DEVICE_ID_VLSI_VAS96011 0x0702
354 
355 #define PCI_VENDOR_ID_ADL 0x1005
356 #define PCI_DEVICE_ID_ADL_2301 0x2301
357 
358 #define PCI_VENDOR_ID_NS 0x100b
359 #define PCI_DEVICE_ID_NS_87415 0x0002
360 #define PCI_DEVICE_ID_NS_87410 0xd001
361 
362 #define PCI_VENDOR_ID_TSENG 0x100c
363 #define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
364 #define PCI_DEVICE_ID_TSENG_W32P_b 0x3205
365 #define PCI_DEVICE_ID_TSENG_W32P_c 0x3206
366 #define PCI_DEVICE_ID_TSENG_W32P_d 0x3207
367 #define PCI_DEVICE_ID_TSENG_ET6000 0x3208
368 
369 #define PCI_VENDOR_ID_WEITEK 0x100e
370 #define PCI_DEVICE_ID_WEITEK_P9000 0x9001
371 #define PCI_DEVICE_ID_WEITEK_P9100 0x9100
372 
373 #define PCI_VENDOR_ID_DEC 0x1011
374 #define PCI_DEVICE_ID_DEC_BRD 0x0001
375 #define PCI_DEVICE_ID_DEC_TULIP 0x0002
376 #define PCI_DEVICE_ID_DEC_TGA 0x0004
377 #define PCI_DEVICE_ID_DEC_TULIP_FAST 0x0009
378 #define PCI_DEVICE_ID_DEC_TGA2 0x000D
379 #define PCI_DEVICE_ID_DEC_FDDI 0x000F
380 #define PCI_DEVICE_ID_DEC_TULIP_PLUS 0x0014
381 #define PCI_DEVICE_ID_DEC_21142 0x0019
382 #define PCI_DEVICE_ID_DEC_21143 0x0019
383 #define PCI_DEVICE_ID_DEC_21052 0x0021
384 #define PCI_DEVICE_ID_DEC_21150 0x0022
385 #define PCI_DEVICE_ID_DEC_21152 0x0024
386 
387 #define PCI_VENDOR_ID_CIRRUS 0x1013
388 #define PCI_DEVICE_ID_CIRRUS_7548 0x0038
389 #define PCI_DEVICE_ID_CIRRUS_5430 0x00a0
390 #define PCI_DEVICE_ID_CIRRUS_5434_4 0x00a4
391 #define PCI_DEVICE_ID_CIRRUS_5434_8 0x00a8
392 #define PCI_DEVICE_ID_CIRRUS_5436 0x00ac
393 #define PCI_DEVICE_ID_CIRRUS_5446 0x00b8
394 #define PCI_DEVICE_ID_CIRRUS_5480 0x00bc
395 #define PCI_DEVICE_ID_CIRRUS_5464 0x00d4
396 #define PCI_DEVICE_ID_CIRRUS_5465 0x00d6
397 #define PCI_DEVICE_ID_CIRRUS_6729 0x1100
398 #define PCI_DEVICE_ID_CIRRUS_6832 0x1110
399 #define PCI_DEVICE_ID_CIRRUS_7542 0x1200
400 #define PCI_DEVICE_ID_CIRRUS_7543 0x1202
401 #define PCI_DEVICE_ID_CIRRUS_7541 0x1204
402 
403 #define PCI_VENDOR_ID_IBM 0x1014
404 #define PCI_DEVICE_ID_IBM_FIRE_CORAL 0x000a
405 #define PCI_DEVICE_ID_IBM_TR 0x0018
406 #define PCI_DEVICE_ID_IBM_82G2675 0x001d
407 #define PCI_DEVICE_ID_IBM_MCA 0x0020
408 #define PCI_DEVICE_ID_IBM_82351 0x0022
409 #define PCI_DEVICE_ID_IBM_SERVERAID 0x002e
410 #define PCI_DEVICE_ID_IBM_TR_WAKE 0x003e
411 #define PCI_DEVICE_ID_IBM_MPIC 0x0046
412 #define PCI_DEVICE_ID_IBM_3780IDSP 0x007d
413 #define PCI_DEVICE_ID_IBM_MPIC_2 0xffff
414 
415 #define PCI_VENDOR_ID_WD 0x101c
416 #define PCI_DEVICE_ID_WD_7197 0x3296
417 
418 #define PCI_VENDOR_ID_AMD 0x1022
419 #define PCI_DEVICE_ID_AMD_LANCE 0x2000
420 #define PCI_DEVICE_ID_AMD_SCSI 0x2020
421 
422 #define PCI_VENDOR_ID_TRIDENT 0x1023
423 #define PCI_DEVICE_ID_TRIDENT_9397 0x9397
424 #define PCI_DEVICE_ID_TRIDENT_9420 0x9420
425 #define PCI_DEVICE_ID_TRIDENT_9440 0x9440
426 #define PCI_DEVICE_ID_TRIDENT_9660 0x9660
427 #define PCI_DEVICE_ID_TRIDENT_9750 0x9750
428 
429 #define PCI_VENDOR_ID_AI 0x1025
430 #define PCI_DEVICE_ID_AI_M1435 0x1435
431 
432 #define PCI_VENDOR_ID_MATROX 0x102B
433 #define PCI_DEVICE_ID_MATROX_MGA_2 0x0518
434 #define PCI_DEVICE_ID_MATROX_MIL 0x0519
435 #define PCI_DEVICE_ID_MATROX_MYS 0x051A
436 #define PCI_DEVICE_ID_MATROX_MIL_2 0x051b
437 #define PCI_DEVICE_ID_MATROX_MIL_2_AGP 0x051f
438 #define PCI_DEVICE_ID_MATROX_MGA_IMP 0x0d10
439 
440 #define PCI_VENDOR_ID_CT 0x102c
441 #define PCI_DEVICE_ID_CT_65545 0x00d8
442 #define PCI_DEVICE_ID_CT_65548 0x00dc
443 #define PCI_DEVICE_ID_CT_65550 0x00e0
444 #define PCI_DEVICE_ID_CT_65554 0x00e4
445 #define PCI_DEVICE_ID_CT_65555 0x00e5
446 
447 #define PCI_VENDOR_ID_MIRO 0x1031
448 #define PCI_DEVICE_ID_MIRO_36050 0x5601
449 
450 #define PCI_VENDOR_ID_NEC 0x1033
451 #define PCI_DEVICE_ID_NEC_PCX2 0x0046
452 
453 #define PCI_VENDOR_ID_FD 0x1036
454 #define PCI_DEVICE_ID_FD_36C70 0x0000
455 
456 #define PCI_VENDOR_ID_SI 0x1039
457 #define PCI_DEVICE_ID_SI_5591_AGP 0x0001
458 #define PCI_DEVICE_ID_SI_6202 0x0002
459 #define PCI_DEVICE_ID_SI_503 0x0008
460 #define PCI_DEVICE_ID_SI_ACPI 0x0009
461 #define PCI_DEVICE_ID_SI_5597_VGA 0x0200
462 #define PCI_DEVICE_ID_SI_6205 0x0205
463 #define PCI_DEVICE_ID_SI_501 0x0406
464 #define PCI_DEVICE_ID_SI_496 0x0496
465 #define PCI_DEVICE_ID_SI_601 0x0601
466 #define PCI_DEVICE_ID_SI_5107 0x5107
467 #define PCI_DEVICE_ID_SI_5511 0x5511
468 #define PCI_DEVICE_ID_SI_5513 0x5513
469 #define PCI_DEVICE_ID_SI_5571 0x5571
470 #define PCI_DEVICE_ID_SI_5591 0x5591
471 #define PCI_DEVICE_ID_SI_5597 0x5597
472 #define PCI_DEVICE_ID_SI_7001 0x7001
473 
474 #define PCI_VENDOR_ID_HP 0x103c
475 #define PCI_DEVICE_ID_HP_J2585A 0x1030
476 #define PCI_DEVICE_ID_HP_J2585B 0x1031
477 
478 #define PCI_VENDOR_ID_PCTECH 0x1042
479 #define PCI_DEVICE_ID_PCTECH_RZ1000 0x1000
480 #define PCI_DEVICE_ID_PCTECH_RZ1001 0x1001
481 #define PCI_DEVICE_ID_PCTECH_SAMURAI_0 0x3000
482 #define PCI_DEVICE_ID_PCTECH_SAMURAI_1 0x3010
483 #define PCI_DEVICE_ID_PCTECH_SAMURAI_IDE 0x3020
484 
485 #define PCI_VENDOR_ID_DPT 0x1044
486 #define PCI_DEVICE_ID_DPT 0xa400
487 
488 #define PCI_VENDOR_ID_OPTI 0x1045
489 #define PCI_DEVICE_ID_OPTI_92C178 0xc178
490 #define PCI_DEVICE_ID_OPTI_82C557 0xc557
491 #define PCI_DEVICE_ID_OPTI_82C558 0xc558
492 #define PCI_DEVICE_ID_OPTI_82C621 0xc621
493 #define PCI_DEVICE_ID_OPTI_82C700 0xc700
494 #define PCI_DEVICE_ID_OPTI_82C701 0xc701
495 #define PCI_DEVICE_ID_OPTI_82C814 0xc814
496 #define PCI_DEVICE_ID_OPTI_82C822 0xc822
497 #define PCI_DEVICE_ID_OPTI_82C825 0xd568
498 
499 #define PCI_VENDOR_ID_SGS 0x104a
500 #define PCI_DEVICE_ID_SGS_2000 0x0008
501 #define PCI_DEVICE_ID_SGS_1764 0x0009
502 
503 #define PCI_VENDOR_ID_BUSLOGIC 0x104B
504 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER_NC 0x0140
505 #define PCI_DEVICE_ID_BUSLOGIC_MULTIMASTER 0x1040
506 #define PCI_DEVICE_ID_BUSLOGIC_FLASHPOINT 0x8130
507 
508 #define PCI_VENDOR_ID_TI 0x104c
509 #define PCI_DEVICE_ID_TI_TVP4010 0x3d04
510 #define PCI_DEVICE_ID_TI_TVP4020 0x3d07
511 #define PCI_DEVICE_ID_TI_PCI1130 0xac12
512 #define PCI_DEVICE_ID_TI_PCI1031 0xac13
513 #define PCI_DEVICE_ID_TI_PCI1131 0xac15
514 #define PCI_DEVICE_ID_TI_PCI1250 0xac16
515 #define PCI_DEVICE_ID_TI_PCI1220 0xac17
516 
517 #define PCI_VENDOR_ID_OAK 0x104e
518 #define PCI_DEVICE_ID_OAK_OTI107 0x0107
519 
520 #define PCI_VENDOR_ID_WINBOND2 0x1050
521 #define PCI_DEVICE_ID_WINBOND2_89C940 0x0940
522 
523 #define PCI_VENDOR_ID_MOTOROLA 0x1057
524 #define PCI_DEVICE_ID_MOTOROLA_MPC105 0x0001
525 #define PCI_DEVICE_ID_MOTOROLA_MPC106 0x0002
526 #define PCI_DEVICE_ID_MOTOROLA_RAVEN 0x4801
527 #define PCI_DEVICE_ID_MOTOROLA_HAWK 0x4803
528 
529 #define PCI_VENDOR_ID_PROMISE 0x105a
530 #define PCI_DEVICE_ID_PROMISE_20246 0x4d33
531 #define PCI_DEVICE_ID_PROMISE_5300 0x5300
532 
533 #define PCI_VENDOR_ID_N9 0x105d
534 #define PCI_DEVICE_ID_N9_I128 0x2309
535 #define PCI_DEVICE_ID_N9_I128_2 0x2339
536 #define PCI_DEVICE_ID_N9_I128_T2R 0x493d
537 
538 #define PCI_VENDOR_ID_UMC 0x1060
539 #define PCI_DEVICE_ID_UMC_UM8673F 0x0101
540 #define PCI_DEVICE_ID_UMC_UM8891A 0x0891
541 #define PCI_DEVICE_ID_UMC_UM8886BF 0x673a
542 #define PCI_DEVICE_ID_UMC_UM8886A 0x886a
543 #define PCI_DEVICE_ID_UMC_UM8881F 0x8881
544 #define PCI_DEVICE_ID_UMC_UM8886F 0x8886
545 #define PCI_DEVICE_ID_UMC_UM9017F 0x9017
546 #define PCI_DEVICE_ID_UMC_UM8886N 0xe886
547 #define PCI_DEVICE_ID_UMC_UM8891N 0xe891
548 
549 #define PCI_VENDOR_ID_X 0x1061
550 #define PCI_DEVICE_ID_X_AGX016 0x0001
551 
552 #define PCI_VENDOR_ID_PICOP 0x1066
553 #define PCI_DEVICE_ID_PICOP_PT86C52X 0x0001
554 #define PCI_DEVICE_ID_PICOP_PT80C524 0x8002
555 
556 #define PCI_VENDOR_ID_APPLE 0x106b
557 #define PCI_DEVICE_ID_APPLE_BANDIT 0x0001
558 #define PCI_DEVICE_ID_APPLE_GC 0x0002
559 #define PCI_DEVICE_ID_APPLE_HYDRA 0x000e
560 
561 #define PCI_VENDOR_ID_NEXGEN 0x1074
562 #define PCI_DEVICE_ID_NEXGEN_82C501 0x4e78
563 
564 #define PCI_VENDOR_ID_QLOGIC 0x1077
565 #define PCI_DEVICE_ID_QLOGIC_ISP1020 0x1020
566 #define PCI_DEVICE_ID_QLOGIC_ISP1022 0x1022
567 
568 #define PCI_VENDOR_ID_CYRIX 0x1078
569 #define PCI_DEVICE_ID_CYRIX_5510 0x0000
570 #define PCI_DEVICE_ID_CYRIX_PCI_MASTER 0x0001
571 #define PCI_DEVICE_ID_CYRIX_5520 0x0002
572 #define PCI_DEVICE_ID_CYRIX_5530_LEGACY 0x0100
573 #define PCI_DEVICE_ID_CYRIX_5530_SMI 0x0101
574 #define PCI_DEVICE_ID_CYRIX_5530_IDE 0x0102
575 #define PCI_DEVICE_ID_CYRIX_5530_AUDIO 0x0103
576 #define PCI_DEVICE_ID_CYRIX_5530_VIDEO 0x0104
577 
578 #define PCI_VENDOR_ID_LEADTEK 0x107d
579 #define PCI_DEVICE_ID_LEADTEK_805 0x0000
580 
581 #define PCI_VENDOR_ID_CONTAQ 0x1080
582 #define PCI_DEVICE_ID_CONTAQ_82C599 0x0600
583 #define PCI_DEVICE_ID_CONTAQ_82C693 0xc693
584 
585 #define PCI_VENDOR_ID_FOREX 0x1083
586 
587 #define PCI_VENDOR_ID_OLICOM 0x108d
588 #define PCI_DEVICE_ID_OLICOM_OC3136 0x0001
589 #define PCI_DEVICE_ID_OLICOM_OC2315 0x0011
590 #define PCI_DEVICE_ID_OLICOM_OC2325 0x0012
591 #define PCI_DEVICE_ID_OLICOM_OC2183 0x0013
592 #define PCI_DEVICE_ID_OLICOM_OC2326 0x0014
593 #define PCI_DEVICE_ID_OLICOM_OC6151 0x0021
594 
595 #define PCI_VENDOR_ID_SUN 0x108e
596 #define PCI_DEVICE_ID_SUN_EBUS 0x1000
597 #define PCI_DEVICE_ID_SUN_HAPPYMEAL 0x1001
598 #define PCI_DEVICE_ID_SUN_SIMBA 0x5000
599 #define PCI_DEVICE_ID_SUN_PBM 0x8000
600 #define PCI_DEVICE_ID_SUN_SABRE 0xa000
601 
602 #define PCI_VENDOR_ID_CMD 0x1095
603 #define PCI_DEVICE_ID_CMD_640 0x0640
604 #define PCI_DEVICE_ID_CMD_643 0x0643
605 #define PCI_DEVICE_ID_CMD_646 0x0646
606 #define PCI_DEVICE_ID_CMD_647 0x0647
607 #define PCI_DEVICE_ID_CMD_670 0x0670
608 
609 #define PCI_VENDOR_ID_VISION 0x1098
610 #define PCI_DEVICE_ID_VISION_QD8500 0x0001
611 #define PCI_DEVICE_ID_VISION_QD8580 0x0002
612 
613 #define PCI_VENDOR_ID_BROOKTREE 0x109e
614 #define PCI_DEVICE_ID_BROOKTREE_848 0x0350
615 #define PCI_DEVICE_ID_BROOKTREE_849A 0x0351
616 #define PCI_DEVICE_ID_BROOKTREE_8474 0x8474
617 
618 #define PCI_VENDOR_ID_SIERRA 0x10a8
619 #define PCI_DEVICE_ID_SIERRA_STB 0x0000
620 
621 #define PCI_VENDOR_ID_ACC 0x10aa
622 #define PCI_DEVICE_ID_ACC_2056 0x0000
623 
624 #define PCI_VENDOR_ID_WINBOND 0x10ad
625 #define PCI_DEVICE_ID_WINBOND_83769 0x0001
626 #define PCI_DEVICE_ID_WINBOND_82C105 0x0105
627 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565
628 
629 #define PCI_VENDOR_ID_DATABOOK 0x10b3
630 #define PCI_DEVICE_ID_DATABOOK_87144 0xb106
631 
632 #define PCI_VENDOR_ID_PLX 0x10b5
633 #define PCI_DEVICE_ID_PLX_9050 0x9050
634 #define PCI_DEVICE_ID_PLX_9060 0x9060
635 #define PCI_DEVICE_ID_PLX_9060ES 0x906E
636 #define PCI_DEVICE_ID_PLX_9060SD 0x906D
637 #define PCI_DEVICE_ID_PLX_9080 0x9080
638 
639 #define PCI_VENDOR_ID_PLX2 0x3388
640 #define PCI_DEVICE_ID_PLX2_PCI6154_HB2 0x0026
641 
642 #define PCI_VENDOR_ID_MADGE 0x10b6
643 #define PCI_DEVICE_ID_MADGE_MK2 0x0002
644 #define PCI_DEVICE_ID_MADGE_C155S 0x1001
645 
646 #define PCI_VENDOR_ID_3COM 0x10b7
647 #define PCI_DEVICE_ID_3COM_3C339 0x3390
648 #define PCI_DEVICE_ID_3COM_3C590 0x5900
649 #define PCI_DEVICE_ID_3COM_3C595TX 0x5950
650 #define PCI_DEVICE_ID_3COM_3C595T4 0x5951
651 #define PCI_DEVICE_ID_3COM_3C595MII 0x5952
652 #define PCI_DEVICE_ID_3COM_3C900TPO 0x9000
653 #define PCI_DEVICE_ID_3COM_3C900COMBO 0x9001
654 #define PCI_DEVICE_ID_3COM_3C905TX 0x9050
655 #define PCI_DEVICE_ID_3COM_3C905T4 0x9051
656 #define PCI_DEVICE_ID_3COM_3C905B_TX 0x9055
657 
658 #define PCI_VENDOR_ID_SMC 0x10b8
659 #define PCI_DEVICE_ID_SMC_EPIC100 0x0005
660 
661 #define PCI_VENDOR_ID_AL 0x10b9
662 #define PCI_DEVICE_ID_AL_M1445 0x1445
663 #define PCI_DEVICE_ID_AL_M1449 0x1449
664 #define PCI_DEVICE_ID_AL_M1451 0x1451
665 #define PCI_DEVICE_ID_AL_M1461 0x1461
666 #define PCI_DEVICE_ID_AL_M1489 0x1489
667 #define PCI_DEVICE_ID_AL_M1511 0x1511
668 #define PCI_DEVICE_ID_AL_M1513 0x1513
669 #define PCI_DEVICE_ID_AL_M1521 0x1521
670 #define PCI_DEVICE_ID_AL_M1523 0x1523
671 #define PCI_DEVICE_ID_AL_M1531 0x1531
672 #define PCI_DEVICE_ID_AL_M1533 0x1533
673 #define PCI_DEVICE_ID_AL_M3307 0x3307
674 #define PCI_DEVICE_ID_AL_M4803 0x5215
675 #define PCI_DEVICE_ID_AL_M5219 0x5219
676 #define PCI_DEVICE_ID_AL_M5229 0x5229
677 #define PCI_DEVICE_ID_AL_M5237 0x5237
678 #define PCI_DEVICE_ID_AL_M7101 0x7101
679 
680 #define PCI_VENDOR_ID_MITSUBISHI 0x10ba
681 
682 #define PCI_VENDOR_ID_SURECOM 0x10bd
683 #define PCI_DEVICE_ID_SURECOM_NE34 0x0e34
684 
685 #define PCI_VENDOR_ID_NEOMAGIC 0x10c8
686 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2070 0x0001
687 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128V 0x0002
688 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_128ZV 0x0003
689 #define PCI_DEVICE_ID_NEOMAGIC_MAGICGRAPH_NM2160 0x0004
690 
691 #define PCI_VENDOR_ID_ASP 0x10cd
692 #define PCI_DEVICE_ID_ASP_ABP940 0x1200
693 #define PCI_DEVICE_ID_ASP_ABP940U 0x1300
694 #define PCI_DEVICE_ID_ASP_ABP940UW 0x2300
695 
696 #define PCI_VENDOR_ID_MACRONIX 0x10d9
697 #define PCI_DEVICE_ID_MACRONIX_MX98713 0x0512
698 #define PCI_DEVICE_ID_MACRONIX_MX987x5 0x0531
699 
700 #define PCI_VENDOR_ID_CERN 0x10dc
701 #define PCI_DEVICE_ID_CERN_SPSB_PMC 0x0001
702 #define PCI_DEVICE_ID_CERN_SPSB_PCI 0x0002
703 #define PCI_DEVICE_ID_CERN_HIPPI_DST 0x0021
704 #define PCI_DEVICE_ID_CERN_HIPPI_SRC 0x0022
705 
706 #define PCI_VENDOR_ID_NVIDIA 0x10de
707 
708 #define PCI_VENDOR_ID_IMS 0x10e0
709 #define PCI_DEVICE_ID_IMS_8849 0x8849
710 
711 #define PCI_VENDOR_ID_TEKRAM2 0x10e1
712 #define PCI_DEVICE_ID_TEKRAM2_690c 0x690c
713 
714 #define PCI_VENDOR_ID_TUNDRA 0x10e3
715 #define PCI_DEVICE_ID_TUNDRA_CA91C042 0x0000
716 
717 #define PCI_VENDOR_ID_AMCC 0x10e8
718 #define PCI_DEVICE_ID_AMCC_MYRINET 0x8043
719 #define PCI_DEVICE_ID_AMCC_PARASTATION 0x8062
720 #define PCI_DEVICE_ID_AMCC_S5933 0x807d
721 #define PCI_DEVICE_ID_AMCC_S5933_HEPC3 0x809c
722 
723 #define PCI_VENDOR_ID_INTERG 0x10ea
724 #define PCI_DEVICE_ID_INTERG_1680 0x1680
725 #define PCI_DEVICE_ID_INTERG_1682 0x1682
726 
727 #define PCI_VENDOR_ID_REALTEK 0x10ec
728 #define PCI_DEVICE_ID_REALTEK_8029 0x8029
729 #define PCI_DEVICE_ID_REALTEK_8129 0x8129
730 #define PCI_DEVICE_ID_REALTEK_8139 0x8139
731 
732 #define PCI_VENDOR_ID_TRUEVISION 0x10fa
733 #define PCI_DEVICE_ID_TRUEVISION_T1000 0x000c
734 
735 #define PCI_VENDOR_ID_INIT 0x1101
736 #define PCI_DEVICE_ID_INIT_320P 0x9100
737 #define PCI_DEVICE_ID_INIT_360P 0x9500
738 
739 #define PCI_VENDOR_ID_TTI 0x1103
740 #define PCI_DEVICE_ID_TTI_HPT343 0x0003
741 
742 #define PCI_VENDOR_ID_VIA 0x1106
743 #define PCI_DEVICE_ID_VIA_82C505 0x0505
744 #define PCI_DEVICE_ID_VIA_82C561 0x0561
745 #define PCI_DEVICE_ID_VIA_82C586_1 0x0571
746 #define PCI_DEVICE_ID_VIA_82C576 0x0576
747 #define PCI_DEVICE_ID_VIA_82C585 0x0585
748 #define PCI_DEVICE_ID_VIA_82C586_0 0x0586
749 #define PCI_DEVICE_ID_VIA_82C595 0x0595
750 #define PCI_DEVICE_ID_VIA_82C597_0 0x0597
751 #define PCI_DEVICE_ID_VIA_82C926 0x0926
752 #define PCI_DEVICE_ID_VIA_82C416 0x1571
753 #define PCI_DEVICE_ID_VIA_82C595_97 0x1595
754 #define PCI_DEVICE_ID_VIA_82C586_2 0x3038
755 #define PCI_DEVICE_ID_VIA_82C586_3 0x3040
756 #define PCI_DEVICE_ID_VIA_86C100A 0x6100
757 #define PCI_DEVICE_ID_VIA_82C597_1 0x8597
758 
759 #define PCI_VENDOR_ID_VORTEX 0x1119
760 #define PCI_DEVICE_ID_VORTEX_GDT60x0 0x0000
761 #define PCI_DEVICE_ID_VORTEX_GDT6000B 0x0001
762 #define PCI_DEVICE_ID_VORTEX_GDT6x10 0x0002
763 #define PCI_DEVICE_ID_VORTEX_GDT6x20 0x0003
764 #define PCI_DEVICE_ID_VORTEX_GDT6530 0x0004
765 #define PCI_DEVICE_ID_VORTEX_GDT6550 0x0005
766 #define PCI_DEVICE_ID_VORTEX_GDT6x17 0x0006
767 #define PCI_DEVICE_ID_VORTEX_GDT6x27 0x0007
768 #define PCI_DEVICE_ID_VORTEX_GDT6537 0x0008
769 #define PCI_DEVICE_ID_VORTEX_GDT6557 0x0009
770 #define PCI_DEVICE_ID_VORTEX_GDT6x15 0x000a
771 #define PCI_DEVICE_ID_VORTEX_GDT6x25 0x000b
772 #define PCI_DEVICE_ID_VORTEX_GDT6535 0x000c
773 #define PCI_DEVICE_ID_VORTEX_GDT6555 0x000d
774 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP 0x0100
775 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP 0x0101
776 #define PCI_DEVICE_ID_VORTEX_GDT6537RP 0x0102
777 #define PCI_DEVICE_ID_VORTEX_GDT6557RP 0x0103
778 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP 0x0104
779 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP 0x0105
780 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP1 0x0110
781 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP1 0x0111
782 #define PCI_DEVICE_ID_VORTEX_GDT6537RP1 0x0112
783 #define PCI_DEVICE_ID_VORTEX_GDT6557RP1 0x0113
784 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP1 0x0114
785 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP1 0x0115
786 #define PCI_DEVICE_ID_VORTEX_GDT6x17RP2 0x0120
787 #define PCI_DEVICE_ID_VORTEX_GDT6x27RP2 0x0121
788 #define PCI_DEVICE_ID_VORTEX_GDT6537RP2 0x0122
789 #define PCI_DEVICE_ID_VORTEX_GDT6557RP2 0x0123
790 #define PCI_DEVICE_ID_VORTEX_GDT6x11RP2 0x0124
791 #define PCI_DEVICE_ID_VORTEX_GDT6x21RP2 0x0125
792 
793 #define PCI_VENDOR_ID_EF 0x111a
794 #define PCI_DEVICE_ID_EF_ATM_FPGA 0x0000
795 #define PCI_DEVICE_ID_EF_ATM_ASIC 0x0002
796 
797 #define PCI_VENDOR_ID_FORE 0x1127
798 #define PCI_DEVICE_ID_FORE_PCA200PC 0x0210
799 #define PCI_DEVICE_ID_FORE_PCA200E 0x0300
800 
801 #define PCI_VENDOR_ID_IMAGINGTECH 0x112f
802 #define PCI_DEVICE_ID_IMAGINGTECH_ICPCI 0x0000
803 
804 #define PCI_VENDOR_ID_PHILIPS 0x1131
805 #define PCI_DEVICE_ID_PHILIPS_SAA7145 0x7145
806 #define PCI_DEVICE_ID_PHILIPS_SAA7146 0x7146
807 
808 #define PCI_VENDOR_ID_CYCLONE 0x113c
809 #define PCI_DEVICE_ID_CYCLONE_SDK 0x0001
810 
811 #define PCI_VENDOR_ID_ALLIANCE 0x1142
812 #define PCI_DEVICE_ID_ALLIANCE_PROMOTIO 0x3210
813 #define PCI_DEVICE_ID_ALLIANCE_PROVIDEO 0x6422
814 #define PCI_DEVICE_ID_ALLIANCE_AT24 0x6424
815 #define PCI_DEVICE_ID_ALLIANCE_AT3D 0x643d
816 
817 #define PCI_VENDOR_ID_SK 0x1148
818 #define PCI_DEVICE_ID_SK_FP 0x4000
819 #define PCI_DEVICE_ID_SK_TR 0x4200
820 #define PCI_DEVICE_ID_SK_GE 0x4300
821 
822 #define PCI_VENDOR_ID_VMIC 0x114a
823 #define PCI_DEVICE_ID_VMIC_VME 0x7587
824 
825 #define PCI_VENDOR_ID_DIGI 0x114f
826 #define PCI_DEVICE_ID_DIGI_EPC 0x0002
827 #define PCI_DEVICE_ID_DIGI_RIGHTSWITCH 0x0003
828 #define PCI_DEVICE_ID_DIGI_XEM 0x0004
829 #define PCI_DEVICE_ID_DIGI_XR 0x0005
830 #define PCI_DEVICE_ID_DIGI_CX 0x0006
831 #define PCI_DEVICE_ID_DIGI_XRJ 0x0009
832 #define PCI_DEVICE_ID_DIGI_EPCJ 0x000a
833 #define PCI_DEVICE_ID_DIGI_XR_920 0x0027
834 
835 #define PCI_VENDOR_ID_MUTECH 0x1159
836 #define PCI_DEVICE_ID_MUTECH_MV1000 0x0001
837 
838 #define PCI_VENDOR_ID_RENDITION 0x1163
839 #define PCI_DEVICE_ID_RENDITION_VERITE 0x0001
840 #define PCI_DEVICE_ID_RENDITION_VERITE2100 0x2000
841 
842 #define PCI_VENDOR_ID_TOSHIBA 0x1179
843 #define PCI_DEVICE_ID_TOSHIBA_601 0x0601
844 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a
845 #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f
846 
847 #define PCI_VENDOR_ID_RICOH 0x1180
848 #define PCI_DEVICE_ID_RICOH_RL5C465 0x0465
849 #define PCI_DEVICE_ID_RICOH_RL5C466 0x0466
850 #define PCI_DEVICE_ID_RICOH_RL5C475 0x0475
851 #define PCI_DEVICE_ID_RICOH_RL5C478 0x0478
852 
853 #define PCI_VENDOR_ID_ARTOP 0x1191
854 #define PCI_DEVICE_ID_ARTOP_ATP8400 0x0004
855 #define PCI_DEVICE_ID_ARTOP_ATP850UF 0x0005
856 
857 #define PCI_VENDOR_ID_ZEITNET 0x1193
858 #define PCI_DEVICE_ID_ZEITNET_1221 0x0001
859 #define PCI_DEVICE_ID_ZEITNET_1225 0x0002
860 
861 #define PCI_VENDOR_ID_OMEGA 0x119b
862 #define PCI_DEVICE_ID_OMEGA_82C092G 0x1221
863 
864 #define PCI_VENDOR_ID_MARVELL 0x11ab
865 #define PCI_DEVICE_ID_MARVELL_GT6426xAB 0x6430
866 
867 #define PCI_VENDOR_ID_LITEON 0x11ad
868 #define PCI_DEVICE_ID_LITEON_LNE100TX 0x0002
869 
870 #define PCI_VENDOR_ID_NP 0x11bc
871 #define PCI_DEVICE_ID_NP_PCI_FDDI 0x0001
872 
873 #define PCI_VENDOR_ID_ATT 0x11c1
874 #define PCI_DEVICE_ID_ATT_L56XMF 0x0440
875 
876 #define PCI_VENDOR_ID_SPECIALIX 0x11cb
877 #define PCI_DEVICE_ID_SPECIALIX_IO8 0x2000
878 #define PCI_DEVICE_ID_SPECIALIX_XIO 0x4000
879 #define PCI_DEVICE_ID_SPECIALIX_RIO 0x8000
880 
881 #define PCI_VENDOR_ID_AURAVISION 0x11d1
882 #define PCI_DEVICE_ID_AURAVISION_VXP524 0x01f7
883 
884 #define PCI_VENDOR_ID_IKON 0x11d5
885 #define PCI_DEVICE_ID_IKON_10115 0x0115
886 #define PCI_DEVICE_ID_IKON_10117 0x0117
887 
888 #define PCI_VENDOR_ID_ZORAN 0x11de
889 #define PCI_DEVICE_ID_ZORAN_36057 0x6057
890 #define PCI_DEVICE_ID_ZORAN_36120 0x6120
891 
892 #define PCI_VENDOR_ID_KINETIC 0x11f4
893 #define PCI_DEVICE_ID_KINETIC_2915 0x2915
894 
895 #define PCI_VENDOR_ID_COMPEX 0x11f6
896 #define PCI_DEVICE_ID_COMPEX_ENET100VG4 0x0112
897 #define PCI_DEVICE_ID_COMPEX_RL2000 0x1401
898 
899 #define PCI_VENDOR_ID_RP 0x11fe
900 #define PCI_DEVICE_ID_RP32INTF 0x0001
901 #define PCI_DEVICE_ID_RP8INTF 0x0002
902 #define PCI_DEVICE_ID_RP16INTF 0x0003
903 #define PCI_DEVICE_ID_RP4QUAD 0x0004
904 #define PCI_DEVICE_ID_RP8OCTA 0x0005
905 #define PCI_DEVICE_ID_RP8J 0x0006
906 #define PCI_DEVICE_ID_RPP4 0x000A
907 #define PCI_DEVICE_ID_RPP8 0x000B
908 #define PCI_DEVICE_ID_RP8M 0x000C
909 
910 #define PCI_VENDOR_ID_CYCLADES 0x120e
911 #define PCI_DEVICE_ID_CYCLOM_Y_Lo 0x0100
912 #define PCI_DEVICE_ID_CYCLOM_Y_Hi 0x0101
913 #define PCI_DEVICE_ID_CYCLOM_Z_Lo 0x0200
914 #define PCI_DEVICE_ID_CYCLOM_Z_Hi 0x0201
915 
916 #define PCI_VENDOR_ID_ESSENTIAL 0x120f
917 #define PCI_DEVICE_ID_ESSENTIAL_ROADRUNNER 0x0001
918 
919 #define PCI_VENDOR_ID_O2 0x1217
920 #define PCI_DEVICE_ID_O2_6729 0x6729
921 #define PCI_DEVICE_ID_O2_6730 0x673a
922 #define PCI_DEVICE_ID_O2_6832 0x6832
923 #define PCI_DEVICE_ID_O2_6836 0x6836
924 
925 #define PCI_VENDOR_ID_3DFX 0x121a
926 #define PCI_DEVICE_ID_3DFX_VOODOO 0x0001
927 #define PCI_DEVICE_ID_3DFX_VOODOO2 0x0002
928 
929 #define PCI_VENDOR_ID_SIGMADES 0x1236
930 #define PCI_DEVICE_ID_SIGMADES_6425 0x6401
931 
932 #define PCI_VENDOR_ID_CCUBE 0x123f
933 
934 #define PCI_VENDOR_ID_DIPIX 0x1246
935 
936 #define PCI_VENDOR_ID_STALLION 0x124d
937 #define PCI_DEVICE_ID_STALLION_ECHPCI832 0x0000
938 #define PCI_DEVICE_ID_STALLION_ECHPCI864 0x0002
939 #define PCI_DEVICE_ID_STALLION_EIOPCI 0x0003
940 
941 #define PCI_VENDOR_ID_OPTIBASE 0x1255
942 #define PCI_DEVICE_ID_OPTIBASE_FORGE 0x1110
943 #define PCI_DEVICE_ID_OPTIBASE_FUSION 0x1210
944 #define PCI_DEVICE_ID_OPTIBASE_VPLEX 0x2110
945 #define PCI_DEVICE_ID_OPTIBASE_VPLEXCC 0x2120
946 #define PCI_DEVICE_ID_OPTIBASE_VQUEST 0x2130
947 
948 #define PCI_VENDOR_ID_SATSAGEM 0x1267
949 #define PCI_DEVICE_ID_SATSAGEM_PCR2101 0x5352
950 #define PCI_DEVICE_ID_SATSAGEM_TELSATTURBO 0x5a4b
951 
952 #define PCI_VENDOR_ID_HUGHES 0x1273
953 #define PCI_DEVICE_ID_HUGHES_DIRECPC 0x0002
954 
955 #define PCI_VENDOR_ID_ENSONIQ 0x1274
956 #define PCI_DEVICE_ID_ENSONIQ_AUDIOPCI 0x5000
957 
958 #define PCI_VENDOR_ID_ALTEON 0x12ae
959 #define PCI_DEVICE_ID_ALTEON_ACENIC 0x0001
960 
961 #define PCI_VENDOR_ID_PICTUREL 0x12c5
962 #define PCI_DEVICE_ID_PICTUREL_PCIVST 0x0081
963 
964 #define PCI_VENDOR_ID_NVIDIA_SGS 0x12d2
965 #define PCI_DEVICE_ID_NVIDIA_SGS_RIVA128 0x0018
966 
967 #define PCI_VENDOR_ID_CBOARDS 0x1307
968 #define PCI_DEVICE_ID_CBOARDS_DAS1602_16 0x0001
969 
970 #define PCI_VENDOR_ID_SYMPHONY 0x1c1c
971 #define PCI_DEVICE_ID_SYMPHONY_101 0x0001
972 
973 #define PCI_VENDOR_ID_TEKRAM 0x1de1
974 #define PCI_DEVICE_ID_TEKRAM_DC290 0xdc29
975 
976 #define PCI_VENDOR_ID_3DLABS 0x3d3d
977 #define PCI_DEVICE_ID_3DLABS_300SX 0x0001
978 #define PCI_DEVICE_ID_3DLABS_500TX 0x0002
979 #define PCI_DEVICE_ID_3DLABS_DELTA 0x0003
980 #define PCI_DEVICE_ID_3DLABS_PERMEDIA 0x0004
981 #define PCI_DEVICE_ID_3DLABS_MX 0x0006
982 
983 #define PCI_VENDOR_ID_AVANCE 0x4005
984 #define PCI_DEVICE_ID_AVANCE_ALG2064 0x2064
985 #define PCI_DEVICE_ID_AVANCE_2302 0x2302
986 
987 #define PCI_VENDOR_ID_NETVIN 0x4a14
988 #define PCI_DEVICE_ID_NETVIN_NV5000SC 0x5000
989 
990 #define PCI_VENDOR_ID_S3 0x5333
991 #define PCI_DEVICE_ID_S3_PLATO_PXS 0x0551
992 #define PCI_DEVICE_ID_S3_ViRGE 0x5631
993 #define PCI_DEVICE_ID_S3_TRIO 0x8811
994 #define PCI_DEVICE_ID_S3_AURORA64VP 0x8812
995 #define PCI_DEVICE_ID_S3_TRIO64UVP 0x8814
996 #define PCI_DEVICE_ID_S3_ViRGE_VX 0x883d
997 #define PCI_DEVICE_ID_S3_868 0x8880
998 #define PCI_DEVICE_ID_S3_928 0x88b0
999 #define PCI_DEVICE_ID_S3_864_1 0x88c0
1000 #define PCI_DEVICE_ID_S3_864_2 0x88c1
1001 #define PCI_DEVICE_ID_S3_964_1 0x88d0
1002 #define PCI_DEVICE_ID_S3_964_2 0x88d1
1003 #define PCI_DEVICE_ID_S3_968 0x88f0
1004 #define PCI_DEVICE_ID_S3_TRIO64V2 0x8901
1005 #define PCI_DEVICE_ID_S3_PLATO_PXG 0x8902
1006 #define PCI_DEVICE_ID_S3_ViRGE_DXGX 0x8a01
1007 #define PCI_DEVICE_ID_S3_ViRGE_GX2 0x8a10
1008 #define PCI_DEVICE_ID_S3_ViRGE_MX 0x8c01
1009 #define PCI_DEVICE_ID_S3_ViRGE_MXP 0x8c02
1010 #define PCI_DEVICE_ID_S3_ViRGE_MXPMV 0x8c03
1011 #define PCI_DEVICE_ID_S3_SONICVIBES 0xca00
1012 
1013 #define PCI_VENDOR_ID_INTEL 0x8086
1014 #define PCI_DEVICE_ID_INTEL_82375 0x0482
1015 #define PCI_DEVICE_ID_INTEL_82424 0x0483
1016 #define PCI_DEVICE_ID_INTEL_82378 0x0484
1017 #define PCI_DEVICE_ID_INTEL_82430 0x0486
1018 #define PCI_DEVICE_ID_INTEL_82434 0x04a3
1019 #define PCI_DEVICE_ID_INTEL_82544EI_COPPER 0x1008
1020 #define PCI_DEVICE_ID_INTEL_82092AA_0 0x1221
1021 #define PCI_DEVICE_ID_INTEL_82092AA_1 0x1222
1022 #define PCI_DEVICE_ID_INTEL_7116 0x1223
1023 #define PCI_DEVICE_ID_INTEL_82596 0x1226
1024 #define PCI_DEVICE_ID_INTEL_82865 0x1227
1025 #define PCI_DEVICE_ID_INTEL_82557 0x1229
1026 #define PCI_DEVICE_ID_INTEL_82437 0x122d
1027 #define PCI_DEVICE_ID_INTEL_82371FB_0 0x122e
1028 #define PCI_DEVICE_ID_INTEL_82371FB_1 0x1230
1029 #define PCI_DEVICE_ID_INTEL_82371MX 0x1234
1030 #define PCI_DEVICE_ID_INTEL_82437MX 0x1235
1031 #define PCI_DEVICE_ID_INTEL_82441 0x1237
1032 #define PCI_DEVICE_ID_INTEL_82380FB 0x124b
1033 #define PCI_DEVICE_ID_INTEL_82439 0x1250
1034 #define PCI_DEVICE_ID_INTEL_82371SB_0 0x7000
1035 #define PCI_DEVICE_ID_INTEL_82371SB_1 0x7010
1036 #define PCI_DEVICE_ID_INTEL_82371SB_2 0x7020
1037 #define PCI_DEVICE_ID_INTEL_82437VX 0x7030
1038 #define PCI_DEVICE_ID_INTEL_82439TX 0x7100
1039 #define PCI_DEVICE_ID_INTEL_82371AB_0 0x7110
1040 #define PCI_DEVICE_ID_INTEL_82371AB 0x7111
1041 #define PCI_DEVICE_ID_INTEL_82371AB_2 0x7112
1042 #define PCI_DEVICE_ID_INTEL_82371AB_3 0x7113
1043 #define PCI_DEVICE_ID_INTEL_82443LX_0 0x7180
1044 #define PCI_DEVICE_ID_INTEL_82443LX_1 0x7181
1045 #define PCI_DEVICE_ID_INTEL_82443BX_0 0x7190
1046 #define PCI_DEVICE_ID_INTEL_82443BX_1 0x7191
1047 #define PCI_DEVICE_ID_INTEL_82443BX_2 0x7192
1048 #define PCI_DEVICE_ID_INTEL_P6 0x84c4
1049 #define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
1050 
1051 #define PCI_VENDOR_ID_KTI 0x8e2e
1052 #define PCI_DEVICE_ID_KTI_ET32P2 0x3000
1053 
1054 #define PCI_VENDOR_ID_ADAPTEC 0x9004
1055 #define PCI_DEVICE_ID_ADAPTEC_7810 0x1078
1056 #define PCI_DEVICE_ID_ADAPTEC_7850 0x5078
1057 #define PCI_DEVICE_ID_ADAPTEC_7855 0x5578
1058 #define PCI_DEVICE_ID_ADAPTEC_5800 0x5800
1059 #define PCI_DEVICE_ID_ADAPTEC_1480A 0x6075
1060 #define PCI_DEVICE_ID_ADAPTEC_7860 0x6078
1061 #define PCI_DEVICE_ID_ADAPTEC_7861 0x6178
1062 #define PCI_DEVICE_ID_ADAPTEC_7870 0x7078
1063 #define PCI_DEVICE_ID_ADAPTEC_7871 0x7178
1064 #define PCI_DEVICE_ID_ADAPTEC_7872 0x7278
1065 #define PCI_DEVICE_ID_ADAPTEC_7873 0x7378
1066 #define PCI_DEVICE_ID_ADAPTEC_7874 0x7478
1067 #define PCI_DEVICE_ID_ADAPTEC_7895 0x7895
1068 #define PCI_DEVICE_ID_ADAPTEC_7880 0x8078
1069 #define PCI_DEVICE_ID_ADAPTEC_7881 0x8178
1070 #define PCI_DEVICE_ID_ADAPTEC_7882 0x8278
1071 #define PCI_DEVICE_ID_ADAPTEC_7883 0x8378
1072 #define PCI_DEVICE_ID_ADAPTEC_7884 0x8478
1073 #define PCI_DEVICE_ID_ADAPTEC_1030 0x8b78
1074 
1075 #define PCI_VENDOR_ID_ADAPTEC2 0x9005
1076 #define PCI_DEVICE_ID_ADAPTEC2_2940U2 0x0010
1077 #define PCI_DEVICE_ID_ADAPTEC2_7890 0x001f
1078 #define PCI_DEVICE_ID_ADAPTEC2_3940U2 0x0050
1079 #define PCI_DEVICE_ID_ADAPTEC2_7896 0x005f
1080 
1081 #define PCI_VENDOR_ID_ATRONICS 0x907f
1082 #define PCI_DEVICE_ID_ATRONICS_2015 0x2015
1083 
1084 #define PCI_VENDOR_ID_HOLTEK 0x9412
1085 #define PCI_DEVICE_ID_HOLTEK_6565 0x6565
1086 
1087 #define PCI_VENDOR_ID_TIGERJET 0xe159
1088 #define PCI_DEVICE_ID_TIGERJET_300 0x0001
1089 
1090 #define PCI_VENDOR_ID_ARK 0xedd8
1091 #define PCI_DEVICE_ID_ARK_STING 0xa091
1092 #define PCI_DEVICE_ID_ARK_STINGARK 0xa099
1093 #define PCI_DEVICE_ID_ARK_2000MT 0xa0a1
1094 /*
1095  * The PCI interface treats multi-function devices as independent
1096  * devices. The slot/function address of each device is encoded
1097  * in a single byte as follows:
1098  *
1099  * 7:3 = slot
1100  * 2:0 = function
1101  */
1102 #define PCI_DEVFN(_slot,_func) ((((_slot) & 0x1f) << 3) | ((_func) & 0x07))
1103 #define PCI_SLOT(_devfn) (((_devfn) >> 3) & 0x1f)
1104 #define PCI_FUNC(_devfn) ((_devfn) & 0x07)
1105 
1106 /*
1107  * Error values that may be returned by the PCI bios.
1108  */
1109 #define PCIBIOS_SUCCESSFUL 0x00
1110 #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81
1111 #define PCIBIOS_BAD_VENDOR_ID 0x83
1112 #define PCIBIOS_DEVICE_NOT_FOUND 0x86
1113 #define PCIBIOS_BAD_REGISTER_NUMBER 0x87
1114 #define PCIBIOS_SET_FAILED 0x88
1115 #define PCIBIOS_BUFFER_TOO_SMALL 0x89
1116 
1117 /* T. Straumann, 7/31/2001: increased to 32 - PMC slots are not
1118  * scanned on mvme2306 otherwise
1119  */
1120 #define PCI_MAX_DEVICES 32
1121 #define PCI_MAX_FUNCTIONS 8
1122 
1123 typedef struct {
1124  int (*read_config_byte)(unsigned char, unsigned char, unsigned char,
1125  unsigned char, uint8_t *);
1126  int (*read_config_word)(unsigned char, unsigned char, unsigned char,
1127  unsigned char, uint16_t *);
1128  int (*read_config_dword)(unsigned char, unsigned char, unsigned char,
1129  unsigned char, uint32_t *);
1130  int (*write_config_byte)(unsigned char, unsigned char, unsigned char,
1131  unsigned char, uint8_t);
1132  int (*write_config_word)(unsigned char, unsigned char, unsigned char,
1133  unsigned char, uint16_t);
1134  int (*write_config_dword)(unsigned char, unsigned char, unsigned char,
1135  unsigned char, uint32_t);
1137 
1138 /* Error codes for pci_initialize */
1139 #define PCIB_ERR_SUCCESS (0)
1140 #define PCIB_ERR_UNINITIALIZED (-1) /* PCI BIOS is not initilized */
1141 #define PCIB_ERR_NOTPRESENT (-2) /* PCI BIOS not present */
1142 #define PCIB_ERR_NOFUNC (-3) /* Function not supported */
1143 #define PCIB_ERR_BADVENDOR (-4) /* Bad Vendor ID */
1144 #define PCIB_ERR_DEVNOTFOUND (-5) /* Device not found */
1145 #define PCIB_ERR_BADREG (-6) /* Bad register number */
1146 
1147 extern int pci_initialize(void);
1148 
1149 typedef struct {
1150  volatile unsigned char* pci_config_addr;
1151  volatile unsigned char* pci_config_data;
1152  const pci_config_access_functions* pci_functions;
1154 
1155 extern rtems_pci_config_t BSP_pci_configuration;
1156 
1157 static inline int
1158 pci_read_config_byte(
1159  unsigned char bus,
1160  unsigned char slot,
1161  unsigned char function,
1162  unsigned char where,
1163  uint8_t *val)
1164 {
1165  return BSP_pci_configuration.pci_functions->read_config_byte(
1166  bus, slot, function, where, val);
1167 }
1168 
1169 static inline int
1170 pci_read_config_word(
1171  unsigned char bus,
1172  unsigned char slot,
1173  unsigned char function,
1174  unsigned char where,
1175  uint16_t *val)
1176 {
1177  return BSP_pci_configuration.pci_functions->read_config_word(
1178  bus, slot, function, where, val);
1179 }
1180 
1181 static inline int
1182 pci_read_config_dword(
1183  unsigned char bus,
1184  unsigned char slot,
1185  unsigned char function,
1186  unsigned char where,
1187  uint32_t *val)
1188 {
1189  return BSP_pci_configuration.pci_functions->read_config_dword(bus, slot, function, where, val);
1190 }
1191 
1192 static inline int
1193 pci_write_config_byte(
1194  unsigned char bus,
1195  unsigned char slot,
1196  unsigned char function,
1197  unsigned char where,
1198  uint8_t val)
1199 {
1200  return BSP_pci_configuration.pci_functions->write_config_byte(
1201  bus, slot, function, where, val);
1202 }
1203 
1204 static inline int
1205 pci_write_config_word(
1206  unsigned char bus,
1207  unsigned char slot,
1208  unsigned char function,
1209  unsigned char where,
1210  uint16_t val)
1211 {
1212  return BSP_pci_configuration.pci_functions->write_config_word(
1213  bus, slot, function, where, val);
1214 }
1215 
1216 static inline int
1217 pci_write_config_dword(
1218  unsigned char bus,
1219  unsigned char slot,
1220  unsigned char function,
1221  unsigned char where,
1222  uint32_t val)
1223 {
1224  return BSP_pci_configuration.pci_functions->write_config_dword(
1225  bus, slot, function, where, val);
1226 }
1227 
1228 /* scan for a specific device */
1229 /* find a particular PCI device
1230  * (currently, only bus0 is scanned for device/fun0)
1231  *
1232  * RETURNS: zero on success, bus/dev/fun in *pbus / *pdev / *pfun
1233  */
1234 int
1235 pci_find_device(
1236  unsigned short vendorid,
1237  unsigned short deviceid,
1238  int instance,
1239  int *pbus,
1240  int *pdev,
1241  int *pfun
1242 );
1243 
1244 /*
1245  * Return the number of PCI busses in the system
1246  */
1247 extern unsigned char pci_bus_count(void);
1248 
1249 #ifdef __cplusplus
1250 }
1251 #endif
1252 
1253 #endif /* _RTEMS_PCI_H */
Definition: pci.h:1149
Definition: pci.h:1123