RTEMS  5.0.0
pci.h
1 /*
2  * PCI defines and function prototypes
3  * Copyright 1994, Drew Eckhardt
4  * Copyright 1997, 1998 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
5  *
6  * For more information, please consult the following manuals (look at
7  * http://www.pcisig.com/ for how to get them):
8  *
9  * PCI BIOS Specification
10  * PCI Local Bus Specification
11  * PCI to PCI Bridge Specification
12  * PCI System Design Guide
13  */
14 
15 #ifndef BOOTLOADER_PCI_H
16 #define BOOTLOADER_PCI_H
17 
18 #include <rtems/pci.h>
19 
20 
21 /* Functions used to access pci configuration space */
23  int (*read_config_byte)(unsigned char, unsigned char,
24  unsigned char, uint8_t *);
25  int (*read_config_word)(unsigned char, unsigned char,
26  unsigned char, uint16_t *);
27  int (*read_config_dword)(unsigned char, unsigned char,
28  unsigned char, uint32_t *);
29  int (*write_config_byte)(unsigned char, unsigned char,
30  unsigned char, uint8_t);
31  int (*write_config_word)(unsigned char, unsigned char,
32  unsigned char, uint16_t);
33  int (*write_config_dword)(unsigned char, unsigned char,
34  unsigned char, uint32_t);
35 };
36 
37 /*
38  * There is one pci_dev structure for each slot-number/function-number
39  * combination:
40  */
41 struct pci_dev {
42  struct pci_bus *bus; /* bus this device is on */
43  struct pci_dev *sibling; /* next device on this bus */
44  struct pci_dev *next; /* chain of all devices */
45 
46  void *sysdata; /* hook for sys-specific extension */
47  struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */
48 
49  unsigned int devfn; /* encoded device & function index */
50  unsigned short vendor;
51  unsigned short device;
52  unsigned int class; /* 3 bytes: (base,sub,prog-if) */
53  unsigned int hdr_type; /* PCI header type */
54  unsigned int master : 1; /* set if device is master capable */
55  /*
56  * In theory, the irq level can be read from configuration
57  * space and all would be fine. However, old PCI chips don't
58  * support these registers and return 0 instead. For example,
59  * the Vision864-P rev 0 chip can uses INTA, but returns 0 in
60  * the interrupt line and pin registers. pci_init()
61  * initializes this field with the value at PCI_INTERRUPT_LINE
62  * and it is the job of pcibios_fixup() to change it if
63  * necessary. The field must not be 0 unless the device
64  * cannot generate interrupts at all.
65  */
66  unsigned int irq; /* irq generated by this device */
67 
68  /* Base registers for this device, can be adjusted by
69  * pcibios_fixup() as necessary.
70  */
71  unsigned long base_address[6];
72  unsigned long rom_address;
73 };
74 
75 struct pci_bus {
76  struct pci_bus *parent; /* parent bus this bridge is on */
77  struct pci_bus *children; /* chain of P2P bridges on this bus */
78  struct pci_bus *next; /* chain of all PCI buses */
79 
80  struct pci_dev *self; /* bridge device as seen by parent */
81  struct pci_dev *devices; /* devices behind this bridge */
82 
83  void *sysdata; /* hook for sys-specific extension */
84  struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */
85 
86  unsigned char number; /* bus number */
87  unsigned char primary; /* number of primary bridge */
88  unsigned char secondary; /* number of secondary bridge */
89  unsigned char subordinate; /* max number of subordinate buses */
90 };
91 
92 extern struct pci_bus pci_root; /* root bus */
93 extern struct pci_dev *pci_devices; /* list of all devices */
94 
95 #endif /* BOOTLOADER_PCI_H */
Definition: rtemscompat1.h:15
Definition: pci.h:75
Definition: pci.h:41