RTEMS  5.0.0
fatal.h
1 /*
2  * Copyright (c) 2012, 2018 embedded brains GmbH. All rights reserved.
3  *
4  * embedded brains GmbH
5  * Dornierstr. 4
6  * 82178 Puchheim
7  * Germany
8  * <rtems@embedded-brains.de>
9  *
10  * The license and distribution terms for this file may be
11  * found in the file LICENSE in this distribution or at
12  * http://www.rtems.org/license/LICENSE.
13  */
14 
15 #ifndef LIBBSP_SHARED_BSP_FATAL_H
16 #define LIBBSP_SHARED_BSP_FATAL_H
17 
18 #include <rtems.h>
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif /* __cplusplus */
23 
24 #define BSP_FATAL_CODE_BLOCK(idx) ((unsigned long) (idx) * 256UL)
25 
29 typedef enum {
30  /* Generic BSP fatal codes */
31  BSP_FATAL_INTERRUPT_INITIALIZATION = BSP_FATAL_CODE_BLOCK(0),
32  BSP_FATAL_SPURIOUS_INTERRUPT,
33  BSP_FATAL_CONSOLE_MULTI_INIT,
34  BSP_FATAL_CONSOLE_NO_MEMORY_0,
35  BSP_FATAL_CONSOLE_NO_MEMORY_1,
36  BSP_FATAL_CONSOLE_NO_MEMORY_2,
37  BSP_FATAL_CONSOLE_NO_MEMORY_3,
38  BSP_FATAL_CONSOLE_REGISTER_DEV_0,
39  BSP_FATAL_CONSOLE_REGISTER_DEV_1,
40  BSP_FATAL_CONSOLE_NO_DEV,
41  BSP_FATAL_CONSOLE_INSTALL_0,
42  BSP_FATAL_CONSOLE_INSTALL_1,
43  BSP_FATAL_CONSOLE_REGISTER_DEV_2,
44 
45  /* ARM fatal codes */
46  BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(1),
47  BSP_ARM_A9MPCORE_FATAL_CLOCK_IRQ_REMOVE,
48  BSP_ARM_PL111_FATAL_REGISTER_DEV,
49  BSP_ARM_PL111_FATAL_SEM_CREATE,
50  BSP_ARM_PL111_FATAL_SEM_RELEASE,
51  BSP_ARM_A9MPCORE_FATAL_CLOCK_SMP_INIT,
52  BSP_ARM_ARMV7M_CPU_COUNTER_INIT,
53  BSP_ARM_FATAL_GENERIC_TIMER_CLOCK_IRQ_INSTALL,
54 
55  /* LEON3 fatal codes */
56  LEON3_FATAL_NO_IRQMP_CONTROLLER = BSP_FATAL_CODE_BLOCK(2),
57  LEON3_FATAL_CONSOLE_REGISTER_DEV,
58  LEON3_FATAL_CLOCK_INITIALIZATION,
59  LEON3_FATAL_INVALID_CACHE_CONFIG_MAIN_PROCESSOR,
60  LEON3_FATAL_INVALID_CACHE_CONFIG_SECONDARY_PROCESSOR,
61  LEON3_FATAL_CLOCK_NO_IRQMP_TIMESTAMP_SUPPORT,
62 
63  /* LPC24XX fatal codes */
64  LPC24XX_FATAL_PL111_SET_UP = BSP_FATAL_CODE_BLOCK(3),
65  LPC24XX_FATAL_PL111_PINS_SET_UP,
66  LPC24XX_FATAL_PL111_PINS_TEAR_DOWN,
67  LPC24XX_FATAL_PL111_TEAR_DOWN,
68 
69  /* MPC5200 fatal codes */
70  MPC5200_FATAL_PCF8563_INVALID_YEAR = BSP_FATAL_CODE_BLOCK(4),
71  MPC5200_FATAL_SLICETIMER_0_IRQ_INSTALL,
72  MPC5200_FATAL_SLICETIMER_1_IRQ_INSTALL,
73  MPC5200_FATAL_TM27_IRQ_INSTALL,
74  MPC5200_FATAL_MSCAN_A_INIT,
75  MPC5200_FATAL_MSCAN_B_INIT,
76  MPC5200_FATAL_MSCAN_A_SET_MODE,
77  MPC5200_FATAL_MSCAN_B_SET_MODE,
78  MPC5200_FATAL_ATA_DISK_IO_INIT,
79  MPC5200_FATAL_ATA_DISK_CREATE,
80  MPC5200_FATAL_ATA_DMA_SINGLE_IRQ_INSTALL,
81  MPC5200_FATAL_ATA_LOCK_CREATE,
82  MPC5200_FATAL_ATA_LOCK_DESTROY,
83 
84  /* MPC55XX fatal codes */
85  MPC55XX_FATAL_FMPLL_LOCK = BSP_FATAL_CODE_BLOCK(5),
86  MPC55XX_FATAL_CLOCK_EMIOS_IRQ_INSTALL,
87  MPC55XX_FATAL_CLOCK_EMIOS_PRESCALER,
88  MPC55XX_FATAL_CLOCK_EMIOS_INTERVAL,
89  MPC55XX_FATAL_CLOCK_PIT_IRQ_INSTALL,
90  MPC55XX_FATAL_CONSOLE_GENERIC_COUNT,
91  MPC55XX_FATAL_CONSOLE_GENERIC_REGISTER,
92  MPC55XX_FATAL_CONSOLE_GENERIC_REGISTER_CONSOLE,
93  MPC55XX_FATAL_CONSOLE_ESCI_BAUD,
94  MPC55XX_FATAL_CONSOLE_ESCI_ATTRIBUTES,
95  MPC55XX_FATAL_CONSOLE_ESCI_IRQ_INSTALL,
96  MPC55XX_FATAL_CONSOLE_LINFLEX_BAUD,
97  MPC55XX_FATAL_CONSOLE_LINFLEX_ATTRIBUTES,
98  MPC55XX_FATAL_CONSOLE_LINFLEX_RX_IRQ_INSTALL,
99  MPC55XX_FATAL_CONSOLE_LINFLEX_TX_IRQ_INSTALL,
100  MPC55XX_FATAL_CONSOLE_LINFLEX_ERR_IRQ_INSTALL,
101  MPC55XX_FATAL_CONSOLE_LINFLEX_RX_IRQ_REMOVE,
102  MPC55XX_FATAL_CONSOLE_LINFLEX_TX_IRQ_REMOVE,
103  MPC55XX_FATAL_CONSOLE_LINFLEX_ERR_IRQ_REMOVE,
104  MPC55XX_FATAL_EDMA_IRQ_INSTALL,
105  MPC55XX_FATAL_EDMA_IRQ_REMOVE,
106 
107  /* MRM332 fatal codes */
108  MRM332_FATAL_SPURIOUS_INTERRUPT = BSP_FATAL_CODE_BLOCK(6),
109 
110  /* PowerPC fatal codes */
111  PPC_FATAL_EXCEPTION_INITIALIZATION = BSP_FATAL_CODE_BLOCK(7),
112 
113  /* Libchip fatal codes */
114  DWMAC_FATAL_TOO_MANY_RBUFS_CONFIGURED = BSP_FATAL_CODE_BLOCK(8),
115 
116  /* ARM fatal codes */
117  ARM_FATAL_L2C_310_UNEXPECTED_ID = BSP_FATAL_CODE_BLOCK(9),
118  ARM_FATAL_L2C_310_UNEXPECTED_NUM_WAYS,
119  ARM_FATAL_L2C_310_EXCLUSIVE_CONFIG,
120 
121  /* QorIQ fatal codes */
122  QORIQ_FATAL_SMP_IPI_HANDLER_INSTALL = BSP_FATAL_CODE_BLOCK(10),
123  QORIQ_FATAL_FDT_NO_BUS_FREQUENCY,
124  QORIQ_FATAL_FDT_NO_CLOCK_FREQUENCY,
125  QORIQ_FATAL_FDT_NO_TIMEBASE_FREQUENCY,
126  QORIQ_FATAL_RESTART_FAILED,
127  QORIQ_FATAL_RESTART_INSTALL_INTERRUPT,
128  QORIQ_FATAL_RESTART_INTERRUPT_FAILED,
129 
130  /* ATSAM fatal codes */
131  ATSAM_FATAL_XDMA_IRQ_INSTALL = BSP_FATAL_CODE_BLOCK(11),
132  ATSAM_FATAL_PIO_IRQ_A,
133  ATSAM_FATAL_PIO_IRQ_B,
134  ATSAM_FATAL_PIO_IRQ_C,
135  ATSAM_FATAL_PIO_IRQ_D,
136  ATSAM_FATAL_PIO_IRQ_E,
137  ATSAM_FATAL_PIO_CONFIGURE_IT,
138 
139  /* i.MX fatal codes */
140  IMX_FATAL_GENERIC_TIMER_FREQUENCY = BSP_FATAL_CODE_BLOCK(12),
141 
142  /* RISC-V fatal codes */
143  RISCV_FATAL_NO_TIMEBASE_FREQUENCY_IN_DEVICE_TREE = BSP_FATAL_CODE_BLOCK(13),
144  RISCV_FATAL_NO_NS16550_REG_IN_DEVICE_TREE,
145  RISCV_FATAL_NO_NS16550_CLOCK_FREQUENCY_IN_DEVICE_TREE,
146  RISCV_FATAL_UNEXPECTED_INTERRUPT_EXCEPTION,
147  RISCV_FATAL_CLOCK_IRQ_INSTALL,
148  RISCV_FATAL_NO_CLINT_REG_IN_DEVICE_TREE,
149  RISCV_FATAL_INVALID_HART_REG_IN_DEVICE_TREE,
150  RISCV_FATAL_INVALID_CLINT_IRQS_EXTENDED_IN_DEVICE_TREE,
151  RISCV_FATAL_NO_PLIC_REG_IN_DEVICE_TREE,
152  RISCV_FATAL_INVALID_PLIC_NDEV_IN_DEVICE_TREE,
153  RISCV_FATAL_TOO_LARGE_PLIC_NDEV_IN_DEVICE_TREE,
154  RISCV_FATAL_INVALID_INTERRUPT_AFFINITY,
155  RISCV_FATAL_NO_NS16550_INTERRUPTS_IN_DEVICE_TREE
156 } bsp_fatal_code;
157 
158 RTEMS_NO_RETURN static inline void
159 bsp_fatal( bsp_fatal_code code )
160 {
161  rtems_fatal( RTEMS_FATAL_SOURCE_BSP, (rtems_fatal_code) code );
162 }
163 
164 #ifdef __cplusplus
165 }
166 #endif /* __cplusplus */
167 
168 #endif /* LIBBSP_SHARED_BSP_FATAL_H */
Fatal source for BSP errors.
Definition: interr.h:89
#define RTEMS_NO_RETURN
Definition: basedefs.h:101
Definition: inftrees.h:24
RTEMS_NO_RETURN RTEMS_INLINE_ROUTINE void rtems_fatal(rtems_fatal_source fatal_source, rtems_fatal_code error_code)
Terminates the system.
Definition: fatal.h:83