26 #ifndef LIBBSP_ARM_TMS570_IRQ_H 27 #define LIBBSP_ARM_TMS570_IRQ_H 35 #define BSP_INTERRUPT_VECTOR_MIN 0U 36 #define TMS570_IRQ_ESM_HIGH 0 37 #define TMS570_IRQ_RESERVED 1 38 #define TMS570_IRQ_TIMER_0 2 39 #define TMS570_IRQ_TIMER_1 3 40 #define TMS570_IRQ_TIMER_2 4 41 #define TMS570_IRQ_TIMER_3 5 42 #define TMS570_IRQ_RTI_OVERFLOW_0 6 43 #define TMS570_IRQ_RTI_OVERFLOW_1 7 44 #define TMS570_IRQ_RTI_TIMEBASE 8 45 #define TMS570_IRQ_GIO_HIGH 9 46 #define TMS570_IRQ_HET_HIGH 10 47 #define TMS570_IRQ_HET_TU_HIGH 11 48 #define TMS570_IRQ_MIBSPI1_HIGH 12 49 #define TMS570_IRQ_SCI_LEVEL_0 13 50 #define TMS570_IRQ_ADC1_EVENT 14 51 #define TMS570_IRQ_ADC1_GROUP_1 15 52 #define TMS570_IRQ_CAN1_HIGH 16 53 #define TMS570_IRQ_RESERVED 17 54 #define TMS570_IRQ_FLEXRAY_HIGH 18 55 #define TMS570_IRQ_CRC_1 19 56 #define TMS570_IRQ_ESM_LOW 20 57 #define TMS570_IRQ_SSI 21 58 #define TMS570_IRQ_PMU 22 59 #define TMS570_IRQ_GIO_LOW 23 60 #define TMS570_IRQ_HET_LOW 24 61 #define TMS570_IRQ_HET_TU_LOW 25 62 #define TMS570_IRQ_MIBSPI1_LOW 26 63 #define TMS570_IRQ_SCI_LEVEL_1 27 64 #define TMS570_IRQ_ADC1_GROUP_2 28 65 #define TMS570_IRQ_CAN1_LOW 29 66 #define TMS570_IRQ_RESERVED 67 #define TMS570_IRQ_ADC1_MAG 31 68 #define TMS570_IRQ_FLEXRAY_LOW 32 69 #define TMS570_IRQ_DMA_FTCA 33 70 #define TMS570_IRQ_DMA_LFSA 34 71 #define TMS570_IRQ_CAN2_HIGH 35 72 #define TMS570_IRQ_DMM_HIGH 36 73 #define TMS570_IRQ_MIBSPI3_HIGH 37 74 #define TMS570_IRQ_MIBSPI3_LOW 38 75 #define TMS570_IRQ_DMA_HBCA 39 76 #define TMS570_IRQ_DMA_BTCA 40 77 #define TMS570_IRQ_DMA_BERA 41 78 #define TMS570_IRQ_CAN2_LOW 42 79 #define TMS570_IRQ_DMM_LOW 43 80 #define TMS570_IRQ_CAN1_IF3 44 81 #define TMS570_IRQ_CAN3_HIGH 45 82 #define TMS570_IRQ_CAN2_IF3 46 83 #define TMS570_IRQ_FPU 47 84 #define TMS570_IRQ_FLEXRAY_TU 48 85 #define TMS570_IRQ_SPI4_HIGH 49 86 #define TMS570_IRQ_ADC2_EVENT 50 87 #define TMS570_IRQ_ADC2_GROUP_1 51 88 #define TMS570_IRQ_FLEXRAY_T0C 52 89 #define TMS570_IRQ_MIBSPIP5_HIGH 53 90 #define TMS570_IRQ_SPI4_LOW 54 91 #define TMS570_IRQ_CAN3_LOW 55 92 #define TMS570_IRQ_MIBSPIP5_LOW 56 93 #define TMS570_IRQ_ADC2_GROUP_2 57 94 #define TMS570_IRQ_FLEXRAY_TU_ERROR 58 95 #define TMS570_IRQ_ADC2_MAG 59 96 #define TMS570_IRQ_CAN3_IF3 60 97 #define TMS570_IRQ_FSM_DONE 61 98 #define TMS570_IRQ_FLEXRAY_T1C 62 99 #define TMS570_IRQ_HET2_LEVEL_0 63 100 #define TMS570_IRQ_SCI2_LEVEL_0 64 101 #define TMS570_IRQ_HET_TU2_LEVEL_0 65 102 #define TMS570_IRQ_IC2_INTERRUPT 66 103 #define TMS570_IRQ_HET2_LEVEL_1 73 104 #define TMS570_IRQ_SCI2_LEVEL_1 74 105 #define TMS570_IRQ_HET_TU2_LEVEL_1 75 106 #define TMS570_IRQ_EMAC_MISC 76 107 #define TMS570_IRQ_EMAC_TX 77 108 #define TMS570_IRQ_EMAC_THRESH 78 109 #define TMS570_IRQ_EMAC_RX 79 110 #define TMS570_IRQ_HWA_INT_REQ_H 80 111 #define TMS570_IRQ_HWA_INT_REQ_H 81 112 #define TMS570_IRQ_DCC_DONE_INTERRUPT 82 113 #define TMS570_IRQ_DCC2_DONE_INTERRUPT 83 114 #define TMS570_IRQ_HWAG1_INT_REQ_L 88 115 #define TMS570_IRQ_HWAG2_INT_REQ_L 89 116 #define BSP_INTERRUPT_VECTOR_MAX 94 118 #define TMS570_IRQ_PRIORITY_VALUE_MIN 0U 119 #define TMS570_IRQ_PRIORITY_VALUE_MAX 0U 121 #define TMS570_IRQ_PRIORITY_COUNT ( TMS570_IRQ_PRIORITY_VALUE_MAX + 1U ) 122 #define TMS570_IRQ_PRIORITY_HIGHEST TMS570_IRQ_PRIORITY_VALUE_MIN 123 #define TMS570_IRQ_PRIORITY_LOWEST TMS570_IRQ_PRIORITY_VALUE_MAX void tms570_irq_set_priority(rtems_vector_number vector, unsigned priority)
Set priority of the interrupt vector.
Definition: irq.c:44
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
Header file for the Interrupt Manager Extension.
unsigned tms570_irq_get_priority(rtems_vector_number vector)
Gets priority of the interrupt vector.
Definition: irq.c:65