RTEMS  5.0.0
bsp.h
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1 
7 /*
8  * Copyright (c) 2013-2014 embedded brains GmbH. All rights reserved.
9  *
10  * embedded brains GmbH
11  * Dornierstr. 4
12  * 82178 Puchheim
13  * Germany
14  * <info@embedded-brains.de>
15  *
16  * The license and distribution terms for this file may be
17  * found in the file LICENSE in this distribution or at
18  * http://www.rtems.org/license/LICENSE.
19  */
20 
21 #ifndef LIBBSP_ARM_XILINX_ZYNQ_BSP_H
22 #define LIBBSP_ARM_XILINX_ZYNQ_BSP_H
23 
34 #include <bspopts.h>
35 
36 #define BSP_FEATURE_IRQ_EXTENSION
37 
38 #ifndef ASM
39 
40 #include <rtems.h>
41 
43 #include <bsp/start.h>
44 
45 #ifdef __cplusplus
46 extern "C" {
47 #endif /* __cplusplus */
48 
49 #define BSP_ARM_A9MPCORE_SCU_BASE 0xf8f00000
50 
51 #define BSP_ARM_GIC_CPUIF_BASE 0xf8f00100
52 
53 #define BSP_ARM_A9MPCORE_GT_BASE 0xf8f00200
54 
55 #define BSP_ARM_A9MPCORE_PT_BASE 0xf8f00600
56 
57 #define BSP_ARM_GIC_DIST_BASE 0xf8f01000
58 
59 #define BSP_ARM_L2C_310_BASE 0xf8f02000
60 
61 #define BSP_ARM_L2C_310_ID 0x410000c8
62 
71 BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void);
72 
73 uint32_t zynq_clock_cpu_1x(void);
74 
75 #ifdef __cplusplus
76 }
77 #endif /* __cplusplus */
78 
79 #endif /* ASM */
80 
83 #endif /* LIBBSP_ARM_XILINX_ZYNQ_BSP_H */
BSP_START_TEXT_SECTION void zynq_setup_mmu_and_cache(void)
Zynq specific set up of the MMU.
Definition: bspstartmmu.c:46
DEFAULT_INITIAL_EXTENSION Support.