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#define | ALT_UART_RBR_THR_DLL_VALUE_LSB 0 |
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#define | ALT_UART_RBR_THR_DLL_VALUE_MSB 7 |
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#define | ALT_UART_RBR_THR_DLL_VALUE_WIDTH 8 |
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#define | ALT_UART_RBR_THR_DLL_VALUE_SET_MSK 0x000000ff |
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#define | ALT_UART_RBR_THR_DLL_VALUE_CLR_MSK 0xffffff00 |
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#define | ALT_UART_RBR_THR_DLL_VALUE_RESET 0x0 |
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#define | ALT_UART_RBR_THR_DLL_VALUE_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_RBR_THR_DLL_VALUE_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_RBR_THR_DLL_OFST 0x0 |
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#define | ALT_UART_RBR_THR_DLL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RBR_THR_DLL_OFST)) |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_E_DISD 0x0 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_E_END 0x1 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_LSB 0 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_MSB 0 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_WIDTH 1 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_SET_MSK 0x00000001 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_CLR_MSK 0xfffffffe |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_RESET 0x0 |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_IER_DLH_ERBFI_DLH0_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_E_DISD 0x0 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_E_END 0x1 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_LSB 1 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_MSB 1 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_WIDTH 1 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_SET_MSK 0x00000002 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_CLR_MSK 0xfffffffd |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_RESET 0x0 |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_IER_DLH_ETBEI_DLHL_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_E_DISD 0x0 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_E_END 0x1 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_LSB 2 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_MSB 2 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_WIDTH 1 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_SET_MSK 0x00000004 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_CLR_MSK 0xfffffffb |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_RESET 0x0 |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_IER_DLH_ELSI_DHL2_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_E_DISD 0x0 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_E_END 0x1 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_LSB 3 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_MSB 3 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_WIDTH 1 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_SET_MSK 0x00000008 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_RESET 0x0 |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_IER_DLH_EDSSI_DHL3_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_IER_DLH_DLH4_LSB 4 |
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#define | ALT_UART_IER_DLH_DLH4_MSB 4 |
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#define | ALT_UART_IER_DLH_DLH4_WIDTH 1 |
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#define | ALT_UART_IER_DLH_DLH4_SET_MSK 0x00000010 |
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#define | ALT_UART_IER_DLH_DLH4_CLR_MSK 0xffffffef |
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#define | ALT_UART_IER_DLH_DLH4_RESET 0x0 |
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#define | ALT_UART_IER_DLH_DLH4_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_IER_DLH_DLH4_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_IER_DLH_DLH5_LSB 5 |
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#define | ALT_UART_IER_DLH_DLH5_MSB 5 |
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#define | ALT_UART_IER_DLH_DLH5_WIDTH 1 |
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#define | ALT_UART_IER_DLH_DLH5_SET_MSK 0x00000020 |
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#define | ALT_UART_IER_DLH_DLH5_CLR_MSK 0xffffffdf |
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#define | ALT_UART_IER_DLH_DLH5_RESET 0x0 |
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#define | ALT_UART_IER_DLH_DLH5_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_UART_IER_DLH_DLH5_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_UART_IER_DLH_DLH6_LSB 6 |
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#define | ALT_UART_IER_DLH_DLH6_MSB 6 |
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#define | ALT_UART_IER_DLH_DLH6_WIDTH 1 |
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#define | ALT_UART_IER_DLH_DLH6_SET_MSK 0x00000040 |
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#define | ALT_UART_IER_DLH_DLH6_CLR_MSK 0xffffffbf |
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#define | ALT_UART_IER_DLH_DLH6_RESET 0x0 |
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#define | ALT_UART_IER_DLH_DLH6_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_UART_IER_DLH_DLH6_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_E_DISD 0x0 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_E_END 0x1 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_LSB 7 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_MSB 7 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_WIDTH 1 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_SET_MSK 0x00000080 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_CLR_MSK 0xffffff7f |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_RESET 0x0 |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_UART_IER_DLH_PTIME_DLH7_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_UART_IER_DLH_OFST 0x4 |
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#define | ALT_UART_IER_DLH_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IER_DLH_OFST)) |
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#define | ALT_UART_IIR_ID_E_MODMSTAT 0x0 |
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#define | ALT_UART_IIR_ID_E_NOINTRPENDING 0x1 |
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#define | ALT_UART_IIR_ID_E_THREMPTY 0x2 |
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#define | ALT_UART_IIR_ID_E_RXDATAVAILABLE 0x4 |
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#define | ALT_UART_IIR_ID_E_RXLINESTAT 0x6 |
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#define | ALT_UART_IIR_ID_E_CHARTMO 0xc |
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#define | ALT_UART_IIR_ID_LSB 0 |
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#define | ALT_UART_IIR_ID_MSB 3 |
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#define | ALT_UART_IIR_ID_WIDTH 4 |
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#define | ALT_UART_IIR_ID_SET_MSK 0x0000000f |
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#define | ALT_UART_IIR_ID_CLR_MSK 0xfffffff0 |
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#define | ALT_UART_IIR_ID_RESET 0x1 |
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#define | ALT_UART_IIR_ID_GET(value) (((value) & 0x0000000f) >> 0) |
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#define | ALT_UART_IIR_ID_SET(value) (((value) << 0) & 0x0000000f) |
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#define | ALT_UART_IIR_FIFOEN_E_DISD 0x0 |
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#define | ALT_UART_IIR_FIFOEN_E_END 0x3 |
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#define | ALT_UART_IIR_FIFOEN_LSB 6 |
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#define | ALT_UART_IIR_FIFOEN_MSB 7 |
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#define | ALT_UART_IIR_FIFOEN_WIDTH 2 |
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#define | ALT_UART_IIR_FIFOEN_SET_MSK 0x000000c0 |
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#define | ALT_UART_IIR_FIFOEN_CLR_MSK 0xffffff3f |
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#define | ALT_UART_IIR_FIFOEN_RESET 0x0 |
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#define | ALT_UART_IIR_FIFOEN_GET(value) (((value) & 0x000000c0) >> 6) |
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#define | ALT_UART_IIR_FIFOEN_SET(value) (((value) << 6) & 0x000000c0) |
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#define | ALT_UART_IIR_OFST 0x8 |
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#define | ALT_UART_IIR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_IIR_OFST)) |
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#define | ALT_UART_FCR_FIFOE_E_DISD 0x0 |
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#define | ALT_UART_FCR_FIFOE_E_END 0x1 |
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#define | ALT_UART_FCR_FIFOE_LSB 0 |
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#define | ALT_UART_FCR_FIFOE_MSB 0 |
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#define | ALT_UART_FCR_FIFOE_WIDTH 1 |
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#define | ALT_UART_FCR_FIFOE_SET_MSK 0x00000001 |
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#define | ALT_UART_FCR_FIFOE_CLR_MSK 0xfffffffe |
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#define | ALT_UART_FCR_FIFOE_RESET 0x0 |
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#define | ALT_UART_FCR_FIFOE_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_FCR_FIFOE_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_FCR_RFIFOR_E_NORST 0x0 |
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#define | ALT_UART_FCR_RFIFOR_E_RST 0x1 |
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#define | ALT_UART_FCR_RFIFOR_LSB 1 |
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#define | ALT_UART_FCR_RFIFOR_MSB 1 |
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#define | ALT_UART_FCR_RFIFOR_WIDTH 1 |
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#define | ALT_UART_FCR_RFIFOR_SET_MSK 0x00000002 |
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#define | ALT_UART_FCR_RFIFOR_CLR_MSK 0xfffffffd |
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#define | ALT_UART_FCR_RFIFOR_RESET 0x0 |
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#define | ALT_UART_FCR_RFIFOR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_FCR_RFIFOR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_FCR_XFIFOR_E_NORST 0x0 |
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#define | ALT_UART_FCR_XFIFOR_E_RST 0x1 |
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#define | ALT_UART_FCR_XFIFOR_LSB 2 |
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#define | ALT_UART_FCR_XFIFOR_MSB 2 |
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#define | ALT_UART_FCR_XFIFOR_WIDTH 1 |
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#define | ALT_UART_FCR_XFIFOR_SET_MSK 0x00000004 |
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#define | ALT_UART_FCR_XFIFOR_CLR_MSK 0xfffffffb |
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#define | ALT_UART_FCR_XFIFOR_RESET 0x0 |
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#define | ALT_UART_FCR_XFIFOR_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_FCR_XFIFOR_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_FCR_DMAM_E_SINGLE 0x0 |
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#define | ALT_UART_FCR_DMAM_E_MULT 0x1 |
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#define | ALT_UART_FCR_DMAM_LSB 3 |
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#define | ALT_UART_FCR_DMAM_MSB 3 |
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#define | ALT_UART_FCR_DMAM_WIDTH 1 |
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#define | ALT_UART_FCR_DMAM_SET_MSK 0x00000008 |
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#define | ALT_UART_FCR_DMAM_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_FCR_DMAM_RESET 0x0 |
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#define | ALT_UART_FCR_DMAM_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_FCR_DMAM_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_FCR_TET_E_FIFOEMPTY 0x0 |
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#define | ALT_UART_FCR_TET_E_TWOCHARS 0x1 |
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#define | ALT_UART_FCR_TET_E_QUARTERFULL 0x2 |
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#define | ALT_UART_FCR_TET_E_HALFFULL 0x3 |
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#define | ALT_UART_FCR_TET_LSB 4 |
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#define | ALT_UART_FCR_TET_MSB 5 |
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#define | ALT_UART_FCR_TET_WIDTH 2 |
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#define | ALT_UART_FCR_TET_SET_MSK 0x00000030 |
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#define | ALT_UART_FCR_TET_CLR_MSK 0xffffffcf |
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#define | ALT_UART_FCR_TET_RESET 0x0 |
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#define | ALT_UART_FCR_TET_GET(value) (((value) & 0x00000030) >> 4) |
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#define | ALT_UART_FCR_TET_SET(value) (((value) << 4) & 0x00000030) |
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#define | ALT_UART_FCR_RT_E_ONECHAR 0x0 |
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#define | ALT_UART_FCR_RT_E_QUARTERFULL 0x1 |
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#define | ALT_UART_FCR_RT_E_HALFFULL 0x2 |
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#define | ALT_UART_FCR_RT_E_FULLLESS2 0x3 |
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#define | ALT_UART_FCR_RT_LSB 6 |
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#define | ALT_UART_FCR_RT_MSB 7 |
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#define | ALT_UART_FCR_RT_WIDTH 2 |
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#define | ALT_UART_FCR_RT_SET_MSK 0x000000c0 |
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#define | ALT_UART_FCR_RT_CLR_MSK 0xffffff3f |
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#define | ALT_UART_FCR_RT_RESET 0x0 |
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#define | ALT_UART_FCR_RT_GET(value) (((value) & 0x000000c0) >> 6) |
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#define | ALT_UART_FCR_RT_SET(value) (((value) << 6) & 0x000000c0) |
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#define | ALT_UART_FCR_OFST 0x8 |
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#define | ALT_UART_FCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FCR_OFST)) |
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#define | ALT_UART_LCR_DLS_E_LEN5 0x0 |
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#define | ALT_UART_LCR_DLS_E_LEN6 0x1 |
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#define | ALT_UART_LCR_DLS_E_LEN7 0x2 |
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#define | ALT_UART_LCR_DLS_E_LEN8 0x3 |
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#define | ALT_UART_LCR_DLS_LSB 0 |
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#define | ALT_UART_LCR_DLS_MSB 1 |
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#define | ALT_UART_LCR_DLS_WIDTH 2 |
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#define | ALT_UART_LCR_DLS_SET_MSK 0x00000003 |
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#define | ALT_UART_LCR_DLS_CLR_MSK 0xfffffffc |
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#define | ALT_UART_LCR_DLS_RESET 0x0 |
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#define | ALT_UART_LCR_DLS_GET(value) (((value) & 0x00000003) >> 0) |
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#define | ALT_UART_LCR_DLS_SET(value) (((value) << 0) & 0x00000003) |
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#define | ALT_UART_LCR_STOP_E_ONESTOP 0x0 |
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#define | ALT_UART_LCR_STOP_E_ONEPOINT5STOP 0x1 |
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#define | ALT_UART_LCR_STOP_LSB 2 |
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#define | ALT_UART_LCR_STOP_MSB 2 |
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#define | ALT_UART_LCR_STOP_WIDTH 1 |
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#define | ALT_UART_LCR_STOP_SET_MSK 0x00000004 |
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#define | ALT_UART_LCR_STOP_CLR_MSK 0xfffffffb |
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#define | ALT_UART_LCR_STOP_RESET 0x0 |
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#define | ALT_UART_LCR_STOP_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_LCR_STOP_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_LCR_PEN_E_DISD 0x0 |
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#define | ALT_UART_LCR_PEN_E_END 0x1 |
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#define | ALT_UART_LCR_PEN_LSB 3 |
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#define | ALT_UART_LCR_PEN_MSB 3 |
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#define | ALT_UART_LCR_PEN_WIDTH 1 |
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#define | ALT_UART_LCR_PEN_SET_MSK 0x00000008 |
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#define | ALT_UART_LCR_PEN_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_LCR_PEN_RESET 0x0 |
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#define | ALT_UART_LCR_PEN_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_LCR_PEN_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_LCR_EPS_E_ODDPAR 0x0 |
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#define | ALT_UART_LCR_EPS_E_EVENPAR 0x1 |
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#define | ALT_UART_LCR_EPS_LSB 4 |
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#define | ALT_UART_LCR_EPS_MSB 4 |
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#define | ALT_UART_LCR_EPS_WIDTH 1 |
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#define | ALT_UART_LCR_EPS_SET_MSK 0x00000010 |
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#define | ALT_UART_LCR_EPS_CLR_MSK 0xffffffef |
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#define | ALT_UART_LCR_EPS_RESET 0x0 |
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#define | ALT_UART_LCR_EPS_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_LCR_EPS_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_LCR_BREAK_LSB 6 |
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#define | ALT_UART_LCR_BREAK_MSB 6 |
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#define | ALT_UART_LCR_BREAK_WIDTH 1 |
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#define | ALT_UART_LCR_BREAK_SET_MSK 0x00000040 |
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#define | ALT_UART_LCR_BREAK_CLR_MSK 0xffffffbf |
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#define | ALT_UART_LCR_BREAK_RESET 0x0 |
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#define | ALT_UART_LCR_BREAK_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_UART_LCR_BREAK_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_UART_LCR_DLAB_LSB 7 |
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#define | ALT_UART_LCR_DLAB_MSB 7 |
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#define | ALT_UART_LCR_DLAB_WIDTH 1 |
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#define | ALT_UART_LCR_DLAB_SET_MSK 0x00000080 |
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#define | ALT_UART_LCR_DLAB_CLR_MSK 0xffffff7f |
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#define | ALT_UART_LCR_DLAB_RESET 0x0 |
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#define | ALT_UART_LCR_DLAB_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_UART_LCR_DLAB_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_UART_LCR_OFST 0xc |
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#define | ALT_UART_LCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LCR_OFST)) |
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#define | ALT_UART_MCR_DTR_E_LOGIC1 0x0 |
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#define | ALT_UART_MCR_DTR_E_LOGIC0 0x1 |
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#define | ALT_UART_MCR_DTR_LSB 0 |
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#define | ALT_UART_MCR_DTR_MSB 0 |
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#define | ALT_UART_MCR_DTR_WIDTH 1 |
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#define | ALT_UART_MCR_DTR_SET_MSK 0x00000001 |
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#define | ALT_UART_MCR_DTR_CLR_MSK 0xfffffffe |
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#define | ALT_UART_MCR_DTR_RESET 0x0 |
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#define | ALT_UART_MCR_DTR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_MCR_DTR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_MCR_RTS_E_LOGIC1 0x0 |
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#define | ALT_UART_MCR_RTS_E_LOGIC0 0x1 |
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#define | ALT_UART_MCR_RTS_LSB 1 |
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#define | ALT_UART_MCR_RTS_MSB 1 |
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#define | ALT_UART_MCR_RTS_WIDTH 1 |
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#define | ALT_UART_MCR_RTS_SET_MSK 0x00000002 |
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#define | ALT_UART_MCR_RTS_CLR_MSK 0xfffffffd |
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#define | ALT_UART_MCR_RTS_RESET 0x0 |
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#define | ALT_UART_MCR_RTS_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_MCR_RTS_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_MCR_OUT1_E_LOGIC1 0x0 |
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#define | ALT_UART_MCR_OUT1_E_LOGIC0 0x1 |
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#define | ALT_UART_MCR_OUT1_LSB 2 |
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#define | ALT_UART_MCR_OUT1_MSB 2 |
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#define | ALT_UART_MCR_OUT1_WIDTH 1 |
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#define | ALT_UART_MCR_OUT1_SET_MSK 0x00000004 |
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#define | ALT_UART_MCR_OUT1_CLR_MSK 0xfffffffb |
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#define | ALT_UART_MCR_OUT1_RESET 0x0 |
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#define | ALT_UART_MCR_OUT1_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_MCR_OUT1_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_MCR_OUT2_E_LOGIC1 0x0 |
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#define | ALT_UART_MCR_OUT2_E_LOGIC0 0x1 |
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#define | ALT_UART_MCR_OUT2_LSB 3 |
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#define | ALT_UART_MCR_OUT2_MSB 3 |
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#define | ALT_UART_MCR_OUT2_WIDTH 1 |
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#define | ALT_UART_MCR_OUT2_SET_MSK 0x00000008 |
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#define | ALT_UART_MCR_OUT2_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_MCR_OUT2_RESET 0x0 |
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#define | ALT_UART_MCR_OUT2_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_MCR_OUT2_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_MCR_LOOPBACK_LSB 4 |
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#define | ALT_UART_MCR_LOOPBACK_MSB 4 |
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#define | ALT_UART_MCR_LOOPBACK_WIDTH 1 |
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#define | ALT_UART_MCR_LOOPBACK_SET_MSK 0x00000010 |
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#define | ALT_UART_MCR_LOOPBACK_CLR_MSK 0xffffffef |
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#define | ALT_UART_MCR_LOOPBACK_RESET 0x0 |
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#define | ALT_UART_MCR_LOOPBACK_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_MCR_LOOPBACK_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_MCR_AFCE_E_DISD 0x0 |
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#define | ALT_UART_MCR_AFCE_E_END 0x1 |
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#define | ALT_UART_MCR_AFCE_LSB 5 |
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#define | ALT_UART_MCR_AFCE_MSB 5 |
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#define | ALT_UART_MCR_AFCE_WIDTH 1 |
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#define | ALT_UART_MCR_AFCE_SET_MSK 0x00000020 |
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#define | ALT_UART_MCR_AFCE_CLR_MSK 0xffffffdf |
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#define | ALT_UART_MCR_AFCE_RESET 0x0 |
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#define | ALT_UART_MCR_AFCE_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_UART_MCR_AFCE_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_UART_MCR_OFST 0x10 |
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#define | ALT_UART_MCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MCR_OFST)) |
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#define | ALT_UART_LSR_DR_E_NODATARDY 0x0 |
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#define | ALT_UART_LSR_DR_E_DATARDY 0x1 |
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#define | ALT_UART_LSR_DR_LSB 0 |
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#define | ALT_UART_LSR_DR_MSB 0 |
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#define | ALT_UART_LSR_DR_WIDTH 1 |
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#define | ALT_UART_LSR_DR_SET_MSK 0x00000001 |
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#define | ALT_UART_LSR_DR_CLR_MSK 0xfffffffe |
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#define | ALT_UART_LSR_DR_RESET 0x0 |
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#define | ALT_UART_LSR_DR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_LSR_DR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_LSR_OE_E_NOOVERRUN 0x0 |
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#define | ALT_UART_LSR_OE_E_OVERRUN 0x1 |
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#define | ALT_UART_LSR_OE_LSB 1 |
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#define | ALT_UART_LSR_OE_MSB 1 |
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#define | ALT_UART_LSR_OE_WIDTH 1 |
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#define | ALT_UART_LSR_OE_SET_MSK 0x00000002 |
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#define | ALT_UART_LSR_OE_CLR_MSK 0xfffffffd |
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#define | ALT_UART_LSR_OE_RESET 0x0 |
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#define | ALT_UART_LSR_OE_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_LSR_OE_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_LSR_PE_E_NOPARITYERR 0x0 |
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#define | ALT_UART_LSR_PE_E_PARITYERR 0x1 |
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#define | ALT_UART_LSR_PE_LSB 2 |
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#define | ALT_UART_LSR_PE_MSB 2 |
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#define | ALT_UART_LSR_PE_WIDTH 1 |
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#define | ALT_UART_LSR_PE_SET_MSK 0x00000004 |
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#define | ALT_UART_LSR_PE_CLR_MSK 0xfffffffb |
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#define | ALT_UART_LSR_PE_RESET 0x0 |
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#define | ALT_UART_LSR_PE_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_LSR_PE_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_LSR_FE_E_NOFRMERR 0x0 |
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#define | ALT_UART_LSR_FE_E_FRMERR 0x1 |
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#define | ALT_UART_LSR_FE_LSB 3 |
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#define | ALT_UART_LSR_FE_MSB 3 |
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#define | ALT_UART_LSR_FE_WIDTH 1 |
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#define | ALT_UART_LSR_FE_SET_MSK 0x00000008 |
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#define | ALT_UART_LSR_FE_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_LSR_FE_RESET 0x0 |
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#define | ALT_UART_LSR_FE_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_LSR_FE_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_LSR_BI_LSB 4 |
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#define | ALT_UART_LSR_BI_MSB 4 |
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#define | ALT_UART_LSR_BI_WIDTH 1 |
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#define | ALT_UART_LSR_BI_SET_MSK 0x00000010 |
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#define | ALT_UART_LSR_BI_CLR_MSK 0xffffffef |
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#define | ALT_UART_LSR_BI_RESET 0x0 |
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#define | ALT_UART_LSR_BI_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_LSR_BI_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_LSR_THRE_LSB 5 |
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#define | ALT_UART_LSR_THRE_MSB 5 |
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#define | ALT_UART_LSR_THRE_WIDTH 1 |
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#define | ALT_UART_LSR_THRE_SET_MSK 0x00000020 |
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#define | ALT_UART_LSR_THRE_CLR_MSK 0xffffffdf |
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#define | ALT_UART_LSR_THRE_RESET 0x1 |
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#define | ALT_UART_LSR_THRE_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_UART_LSR_THRE_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_UART_LSR_TEMT_E_NOTEMPTY 0x0 |
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#define | ALT_UART_LSR_TEMT_E_EMPTY 0x1 |
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#define | ALT_UART_LSR_TEMT_LSB 6 |
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#define | ALT_UART_LSR_TEMT_MSB 6 |
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#define | ALT_UART_LSR_TEMT_WIDTH 1 |
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#define | ALT_UART_LSR_TEMT_SET_MSK 0x00000040 |
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#define | ALT_UART_LSR_TEMT_CLR_MSK 0xffffffbf |
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#define | ALT_UART_LSR_TEMT_RESET 0x1 |
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#define | ALT_UART_LSR_TEMT_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_UART_LSR_TEMT_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_UART_LSR_RFE_E_NOERR 0x0 |
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#define | ALT_UART_LSR_RFE_E_ERR 0x1 |
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#define | ALT_UART_LSR_RFE_LSB 7 |
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#define | ALT_UART_LSR_RFE_MSB 7 |
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#define | ALT_UART_LSR_RFE_WIDTH 1 |
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#define | ALT_UART_LSR_RFE_SET_MSK 0x00000080 |
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#define | ALT_UART_LSR_RFE_CLR_MSK 0xffffff7f |
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#define | ALT_UART_LSR_RFE_RESET 0x0 |
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#define | ALT_UART_LSR_RFE_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_UART_LSR_RFE_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_UART_LSR_OFST 0x14 |
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#define | ALT_UART_LSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_LSR_OFST)) |
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#define | ALT_UART_MSR_DCTS_E_NOCHG 0x0 |
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#define | ALT_UART_MSR_DCTS_E_CHG 0x1 |
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#define | ALT_UART_MSR_DCTS_LSB 0 |
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#define | ALT_UART_MSR_DCTS_MSB 0 |
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#define | ALT_UART_MSR_DCTS_WIDTH 1 |
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#define | ALT_UART_MSR_DCTS_SET_MSK 0x00000001 |
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#define | ALT_UART_MSR_DCTS_CLR_MSK 0xfffffffe |
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#define | ALT_UART_MSR_DCTS_RESET 0x0 |
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#define | ALT_UART_MSR_DCTS_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_MSR_DCTS_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_MSR_DDSR_E_NOCHG 0x0 |
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#define | ALT_UART_MSR_DDSR_E_CHG 0x1 |
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#define | ALT_UART_MSR_DDSR_LSB 1 |
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#define | ALT_UART_MSR_DDSR_MSB 1 |
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#define | ALT_UART_MSR_DDSR_WIDTH 1 |
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#define | ALT_UART_MSR_DDSR_SET_MSK 0x00000002 |
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#define | ALT_UART_MSR_DDSR_CLR_MSK 0xfffffffd |
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#define | ALT_UART_MSR_DDSR_RESET 0x0 |
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#define | ALT_UART_MSR_DDSR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_MSR_DDSR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_MSR_TERI_E_NOCHG 0x0 |
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#define | ALT_UART_MSR_TERI_E_CHG 0x1 |
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#define | ALT_UART_MSR_TERI_LSB 2 |
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#define | ALT_UART_MSR_TERI_MSB 2 |
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#define | ALT_UART_MSR_TERI_WIDTH 1 |
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#define | ALT_UART_MSR_TERI_SET_MSK 0x00000004 |
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#define | ALT_UART_MSR_TERI_CLR_MSK 0xfffffffb |
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#define | ALT_UART_MSR_TERI_RESET 0x0 |
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#define | ALT_UART_MSR_TERI_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_MSR_TERI_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_MSR_DDCD_E_NOCHG 0x0 |
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#define | ALT_UART_MSR_DDCD_E_CHG 0x1 |
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#define | ALT_UART_MSR_DDCD_LSB 3 |
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#define | ALT_UART_MSR_DDCD_MSB 3 |
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#define | ALT_UART_MSR_DDCD_WIDTH 1 |
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#define | ALT_UART_MSR_DDCD_SET_MSK 0x00000008 |
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#define | ALT_UART_MSR_DDCD_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_MSR_DDCD_RESET 0x0 |
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#define | ALT_UART_MSR_DDCD_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_MSR_DDCD_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_MSR_CTS_E_LOGIC1 0x0 |
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#define | ALT_UART_MSR_CTS_E_LOGIC0 0x1 |
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#define | ALT_UART_MSR_CTS_LSB 4 |
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#define | ALT_UART_MSR_CTS_MSB 4 |
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#define | ALT_UART_MSR_CTS_WIDTH 1 |
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#define | ALT_UART_MSR_CTS_SET_MSK 0x00000010 |
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#define | ALT_UART_MSR_CTS_CLR_MSK 0xffffffef |
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#define | ALT_UART_MSR_CTS_RESET 0x0 |
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#define | ALT_UART_MSR_CTS_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_MSR_CTS_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_MSR_DSR_E_LOGIC1 0x0 |
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#define | ALT_UART_MSR_DSR_E_LOGIC0 0x1 |
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#define | ALT_UART_MSR_DSR_LSB 5 |
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#define | ALT_UART_MSR_DSR_MSB 5 |
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#define | ALT_UART_MSR_DSR_WIDTH 1 |
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#define | ALT_UART_MSR_DSR_SET_MSK 0x00000020 |
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#define | ALT_UART_MSR_DSR_CLR_MSK 0xffffffdf |
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#define | ALT_UART_MSR_DSR_RESET 0x0 |
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#define | ALT_UART_MSR_DSR_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_UART_MSR_DSR_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_UART_MSR_RI_E_LOGIC1 0x0 |
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#define | ALT_UART_MSR_RI_E_LOGIC0 0x1 |
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#define | ALT_UART_MSR_RI_LSB 6 |
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#define | ALT_UART_MSR_RI_MSB 6 |
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#define | ALT_UART_MSR_RI_WIDTH 1 |
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#define | ALT_UART_MSR_RI_SET_MSK 0x00000040 |
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#define | ALT_UART_MSR_RI_CLR_MSK 0xffffffbf |
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#define | ALT_UART_MSR_RI_RESET 0x0 |
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#define | ALT_UART_MSR_RI_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_UART_MSR_RI_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_UART_MSR_DCD_E_LOGIC1 0x0 |
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#define | ALT_UART_MSR_DCD_E_LOGIC0 0x1 |
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#define | ALT_UART_MSR_DCD_LSB 7 |
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#define | ALT_UART_MSR_DCD_MSB 7 |
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#define | ALT_UART_MSR_DCD_WIDTH 1 |
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#define | ALT_UART_MSR_DCD_SET_MSK 0x00000080 |
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#define | ALT_UART_MSR_DCD_CLR_MSK 0xffffff7f |
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#define | ALT_UART_MSR_DCD_RESET 0x0 |
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#define | ALT_UART_MSR_DCD_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_UART_MSR_DCD_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_UART_MSR_OFST 0x18 |
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#define | ALT_UART_MSR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_MSR_OFST)) |
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#define | ALT_UART_SCR_SCR_LSB 0 |
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#define | ALT_UART_SCR_SCR_MSB 7 |
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#define | ALT_UART_SCR_SCR_WIDTH 8 |
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#define | ALT_UART_SCR_SCR_SET_MSK 0x000000ff |
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#define | ALT_UART_SCR_SCR_CLR_MSK 0xffffff00 |
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#define | ALT_UART_SCR_SCR_RESET 0x0 |
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#define | ALT_UART_SCR_SCR_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_SCR_SCR_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_SCR_OFST 0x1c |
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#define | ALT_UART_SCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SCR_OFST)) |
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#define | ALT_UART_SRBR_SRBR_LSB 0 |
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#define | ALT_UART_SRBR_SRBR_MSB 7 |
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#define | ALT_UART_SRBR_SRBR_WIDTH 8 |
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#define | ALT_UART_SRBR_SRBR_SET_MSK 0x000000ff |
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#define | ALT_UART_SRBR_SRBR_CLR_MSK 0xffffff00 |
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#define | ALT_UART_SRBR_SRBR_RESET 0x0 |
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#define | ALT_UART_SRBR_SRBR_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_SRBR_SRBR_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_SRBR_OFST 0x30 |
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#define | ALT_UART_SRBR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRBR_OFST)) |
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#define | ALT_UART_STHR_STHR_LSB 0 |
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#define | ALT_UART_STHR_STHR_MSB 7 |
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#define | ALT_UART_STHR_STHR_WIDTH 8 |
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#define | ALT_UART_STHR_STHR_SET_MSK 0x000000ff |
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#define | ALT_UART_STHR_STHR_CLR_MSK 0xffffff00 |
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#define | ALT_UART_STHR_STHR_RESET 0x0 |
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#define | ALT_UART_STHR_STHR_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_STHR_STHR_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_STHR_OFST 0x34 |
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#define | ALT_UART_STHR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_STHR_OFST)) |
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#define | ALT_UART_FAR_SRBR_STHR_E_DISD 0x0 |
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#define | ALT_UART_FAR_SRBR_STHR_E_END 0x1 |
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#define | ALT_UART_FAR_SRBR_STHR_LSB 0 |
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#define | ALT_UART_FAR_SRBR_STHR_MSB 0 |
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#define | ALT_UART_FAR_SRBR_STHR_WIDTH 1 |
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#define | ALT_UART_FAR_SRBR_STHR_SET_MSK 0x00000001 |
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#define | ALT_UART_FAR_SRBR_STHR_CLR_MSK 0xfffffffe |
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#define | ALT_UART_FAR_SRBR_STHR_RESET 0x0 |
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#define | ALT_UART_FAR_SRBR_STHR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_FAR_SRBR_STHR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_FAR_OFST 0x70 |
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#define | ALT_UART_FAR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_FAR_OFST)) |
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#define | ALT_UART_TFR_TFR_LSB 0 |
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#define | ALT_UART_TFR_TFR_MSB 7 |
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#define | ALT_UART_TFR_TFR_WIDTH 8 |
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#define | ALT_UART_TFR_TFR_SET_MSK 0x000000ff |
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#define | ALT_UART_TFR_TFR_CLR_MSK 0xffffff00 |
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#define | ALT_UART_TFR_TFR_RESET 0x0 |
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#define | ALT_UART_TFR_TFR_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_TFR_TFR_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_TFR_OFST 0x74 |
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#define | ALT_UART_TFR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFR_OFST)) |
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#define | ALT_UART_RFW_RFWD_LSB 0 |
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#define | ALT_UART_RFW_RFWD_MSB 7 |
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#define | ALT_UART_RFW_RFWD_WIDTH 8 |
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#define | ALT_UART_RFW_RFWD_SET_MSK 0x000000ff |
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#define | ALT_UART_RFW_RFWD_CLR_MSK 0xffffff00 |
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#define | ALT_UART_RFW_RFWD_RESET 0x0 |
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#define | ALT_UART_RFW_RFWD_GET(value) (((value) & 0x000000ff) >> 0) |
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#define | ALT_UART_RFW_RFWD_SET(value) (((value) << 0) & 0x000000ff) |
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#define | ALT_UART_RFW_RFPE_LSB 8 |
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#define | ALT_UART_RFW_RFPE_MSB 8 |
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#define | ALT_UART_RFW_RFPE_WIDTH 1 |
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#define | ALT_UART_RFW_RFPE_SET_MSK 0x00000100 |
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#define | ALT_UART_RFW_RFPE_CLR_MSK 0xfffffeff |
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#define | ALT_UART_RFW_RFPE_RESET 0x0 |
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#define | ALT_UART_RFW_RFPE_GET(value) (((value) & 0x00000100) >> 8) |
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#define | ALT_UART_RFW_RFPE_SET(value) (((value) << 8) & 0x00000100) |
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#define | ALT_UART_RFW_RFFE_LSB 9 |
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#define | ALT_UART_RFW_RFFE_MSB 9 |
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#define | ALT_UART_RFW_RFFE_WIDTH 1 |
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#define | ALT_UART_RFW_RFFE_SET_MSK 0x00000200 |
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#define | ALT_UART_RFW_RFFE_CLR_MSK 0xfffffdff |
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#define | ALT_UART_RFW_RFFE_RESET 0x0 |
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#define | ALT_UART_RFW_RFFE_GET(value) (((value) & 0x00000200) >> 9) |
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#define | ALT_UART_RFW_RFFE_SET(value) (((value) << 9) & 0x00000200) |
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#define | ALT_UART_RFW_OFST 0x78 |
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#define | ALT_UART_RFW_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFW_OFST)) |
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#define | ALT_UART_USR_TFNF_E_FULL 0x0 |
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#define | ALT_UART_USR_TFNF_E_NOTFULL 0x1 |
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#define | ALT_UART_USR_TFNF_LSB 1 |
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#define | ALT_UART_USR_TFNF_MSB 1 |
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#define | ALT_UART_USR_TFNF_WIDTH 1 |
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#define | ALT_UART_USR_TFNF_SET_MSK 0x00000002 |
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#define | ALT_UART_USR_TFNF_CLR_MSK 0xfffffffd |
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#define | ALT_UART_USR_TFNF_RESET 0x1 |
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#define | ALT_UART_USR_TFNF_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_USR_TFNF_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_USR_TFE_E_NOTEMPTY 0x0 |
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#define | ALT_UART_USR_TFE_E_EMPTY 0x1 |
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#define | ALT_UART_USR_TFE_LSB 2 |
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#define | ALT_UART_USR_TFE_MSB 2 |
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#define | ALT_UART_USR_TFE_WIDTH 1 |
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#define | ALT_UART_USR_TFE_SET_MSK 0x00000004 |
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#define | ALT_UART_USR_TFE_CLR_MSK 0xfffffffb |
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#define | ALT_UART_USR_TFE_RESET 0x1 |
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#define | ALT_UART_USR_TFE_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_USR_TFE_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_USR_RFNE_E_EMPTY 0x0 |
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#define | ALT_UART_USR_RFNE_E_NOTEMPTY 0x1 |
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#define | ALT_UART_USR_RFNE_LSB 3 |
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#define | ALT_UART_USR_RFNE_MSB 3 |
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#define | ALT_UART_USR_RFNE_WIDTH 1 |
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#define | ALT_UART_USR_RFNE_SET_MSK 0x00000008 |
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#define | ALT_UART_USR_RFNE_CLR_MSK 0xfffffff7 |
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#define | ALT_UART_USR_RFNE_RESET 0x0 |
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#define | ALT_UART_USR_RFNE_GET(value) (((value) & 0x00000008) >> 3) |
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#define | ALT_UART_USR_RFNE_SET(value) (((value) << 3) & 0x00000008) |
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#define | ALT_UART_USR_RFF_E_NOTFULL 0x0 |
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#define | ALT_UART_USR_RFF_E_FULL 0x1 |
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#define | ALT_UART_USR_RFF_LSB 4 |
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#define | ALT_UART_USR_RFF_MSB 4 |
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#define | ALT_UART_USR_RFF_WIDTH 1 |
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#define | ALT_UART_USR_RFF_SET_MSK 0x00000010 |
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#define | ALT_UART_USR_RFF_CLR_MSK 0xffffffef |
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#define | ALT_UART_USR_RFF_RESET 0x0 |
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#define | ALT_UART_USR_RFF_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_USR_RFF_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_USR_OFST 0x7c |
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#define | ALT_UART_USR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_USR_OFST)) |
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#define | ALT_UART_TFL_TFL_LSB 0 |
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#define | ALT_UART_TFL_TFL_MSB 4 |
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#define | ALT_UART_TFL_TFL_WIDTH 5 |
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#define | ALT_UART_TFL_TFL_SET_MSK 0x0000001f |
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#define | ALT_UART_TFL_TFL_CLR_MSK 0xffffffe0 |
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#define | ALT_UART_TFL_TFL_RESET 0x0 |
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#define | ALT_UART_TFL_TFL_GET(value) (((value) & 0x0000001f) >> 0) |
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#define | ALT_UART_TFL_TFL_SET(value) (((value) << 0) & 0x0000001f) |
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#define | ALT_UART_TFL_OFST 0x80 |
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#define | ALT_UART_TFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_TFL_OFST)) |
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#define | ALT_UART_RFL_RFL_LSB 0 |
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#define | ALT_UART_RFL_RFL_MSB 4 |
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#define | ALT_UART_RFL_RFL_WIDTH 5 |
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#define | ALT_UART_RFL_RFL_SET_MSK 0x0000001f |
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#define | ALT_UART_RFL_RFL_CLR_MSK 0xffffffe0 |
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#define | ALT_UART_RFL_RFL_RESET 0x0 |
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#define | ALT_UART_RFL_RFL_GET(value) (((value) & 0x0000001f) >> 0) |
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#define | ALT_UART_RFL_RFL_SET(value) (((value) << 0) & 0x0000001f) |
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#define | ALT_UART_RFL_OFST 0x84 |
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#define | ALT_UART_RFL_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_RFL_OFST)) |
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#define | ALT_UART_SRR_UR_E_NORST 0x0 |
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#define | ALT_UART_SRR_UR_E_RST 0x1 |
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#define | ALT_UART_SRR_UR_LSB 0 |
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#define | ALT_UART_SRR_UR_MSB 0 |
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#define | ALT_UART_SRR_UR_WIDTH 1 |
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#define | ALT_UART_SRR_UR_SET_MSK 0x00000001 |
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#define | ALT_UART_SRR_UR_CLR_MSK 0xfffffffe |
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#define | ALT_UART_SRR_UR_RESET 0x0 |
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#define | ALT_UART_SRR_UR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_SRR_UR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_SRR_RFR_E_NORST 0x0 |
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#define | ALT_UART_SRR_RFR_E_RST 0x1 |
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#define | ALT_UART_SRR_RFR_LSB 1 |
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#define | ALT_UART_SRR_RFR_MSB 1 |
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#define | ALT_UART_SRR_RFR_WIDTH 1 |
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#define | ALT_UART_SRR_RFR_SET_MSK 0x00000002 |
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#define | ALT_UART_SRR_RFR_CLR_MSK 0xfffffffd |
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#define | ALT_UART_SRR_RFR_RESET 0x0 |
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#define | ALT_UART_SRR_RFR_GET(value) (((value) & 0x00000002) >> 1) |
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#define | ALT_UART_SRR_RFR_SET(value) (((value) << 1) & 0x00000002) |
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#define | ALT_UART_SRR_XFR_E_NORST 0x0 |
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#define | ALT_UART_SRR_XFR_E_RST 0x1 |
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#define | ALT_UART_SRR_XFR_LSB 2 |
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#define | ALT_UART_SRR_XFR_MSB 2 |
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#define | ALT_UART_SRR_XFR_WIDTH 1 |
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#define | ALT_UART_SRR_XFR_SET_MSK 0x00000004 |
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#define | ALT_UART_SRR_XFR_CLR_MSK 0xfffffffb |
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#define | ALT_UART_SRR_XFR_RESET 0x0 |
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#define | ALT_UART_SRR_XFR_GET(value) (((value) & 0x00000004) >> 2) |
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#define | ALT_UART_SRR_XFR_SET(value) (((value) << 2) & 0x00000004) |
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#define | ALT_UART_SRR_OFST 0x88 |
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#define | ALT_UART_SRR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRR_OFST)) |
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#define | ALT_UART_SRTS_SRTS_E_LOGIC0 0x1 |
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#define | ALT_UART_SRTS_SRTS_E_LOGIC1 0x0 |
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#define | ALT_UART_SRTS_SRTS_LSB 0 |
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#define | ALT_UART_SRTS_SRTS_MSB 0 |
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#define | ALT_UART_SRTS_SRTS_WIDTH 1 |
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#define | ALT_UART_SRTS_SRTS_SET_MSK 0x00000001 |
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#define | ALT_UART_SRTS_SRTS_CLR_MSK 0xfffffffe |
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#define | ALT_UART_SRTS_SRTS_RESET 0x0 |
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#define | ALT_UART_SRTS_SRTS_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_SRTS_SRTS_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_SRTS_OFST 0x8c |
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#define | ALT_UART_SRTS_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRTS_OFST)) |
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#define | ALT_UART_SBCR_SBCR_E_DISD 0x0 |
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#define | ALT_UART_SBCR_SBCR_E_END 0x1 |
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#define | ALT_UART_SBCR_SBCR_LSB 0 |
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#define | ALT_UART_SBCR_SBCR_MSB 0 |
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#define | ALT_UART_SBCR_SBCR_WIDTH 1 |
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#define | ALT_UART_SBCR_SBCR_SET_MSK 0x00000001 |
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#define | ALT_UART_SBCR_SBCR_CLR_MSK 0xfffffffe |
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#define | ALT_UART_SBCR_SBCR_RESET 0x0 |
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#define | ALT_UART_SBCR_SBCR_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_SBCR_SBCR_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_SBCR_OFST 0x90 |
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#define | ALT_UART_SBCR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SBCR_OFST)) |
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#define | ALT_UART_SDMAM_SDMAM_E_SINGLE 0x0 |
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#define | ALT_UART_SDMAM_SDMAM_E_MULT 0x1 |
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#define | ALT_UART_SDMAM_SDMAM_LSB 0 |
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#define | ALT_UART_SDMAM_SDMAM_MSB 0 |
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#define | ALT_UART_SDMAM_SDMAM_WIDTH 1 |
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#define | ALT_UART_SDMAM_SDMAM_SET_MSK 0x00000001 |
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#define | ALT_UART_SDMAM_SDMAM_CLR_MSK 0xfffffffe |
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#define | ALT_UART_SDMAM_SDMAM_RESET 0x0 |
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#define | ALT_UART_SDMAM_SDMAM_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_SDMAM_SDMAM_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_SDMAM_OFST 0x94 |
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#define | ALT_UART_SDMAM_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SDMAM_OFST)) |
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#define | ALT_UART_SFE_SFE_E_DISD 0x0 |
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#define | ALT_UART_SFE_SFE_E_END 0x1 |
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#define | ALT_UART_SFE_SFE_LSB 0 |
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#define | ALT_UART_SFE_SFE_MSB 0 |
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#define | ALT_UART_SFE_SFE_WIDTH 1 |
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#define | ALT_UART_SFE_SFE_SET_MSK 0x00000001 |
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#define | ALT_UART_SFE_SFE_CLR_MSK 0xfffffffe |
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#define | ALT_UART_SFE_SFE_RESET 0x0 |
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#define | ALT_UART_SFE_SFE_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_SFE_SFE_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_SFE_OFST 0x98 |
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#define | ALT_UART_SFE_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SFE_OFST)) |
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#define | ALT_UART_SRT_SRT_E_ONECHAR 0x0 |
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#define | ALT_UART_SRT_SRT_E_QUARTERFULL 0x1 |
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#define | ALT_UART_SRT_SRT_E_HALFFULL 0x2 |
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#define | ALT_UART_SRT_SRT_E_FULLLESS2 0x3 |
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#define | ALT_UART_SRT_SRT_LSB 0 |
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#define | ALT_UART_SRT_SRT_MSB 1 |
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#define | ALT_UART_SRT_SRT_WIDTH 2 |
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#define | ALT_UART_SRT_SRT_SET_MSK 0x00000003 |
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#define | ALT_UART_SRT_SRT_CLR_MSK 0xfffffffc |
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#define | ALT_UART_SRT_SRT_RESET 0x0 |
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#define | ALT_UART_SRT_SRT_GET(value) (((value) & 0x00000003) >> 0) |
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#define | ALT_UART_SRT_SRT_SET(value) (((value) << 0) & 0x00000003) |
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#define | ALT_UART_SRT_OFST 0x9c |
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#define | ALT_UART_SRT_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_SRT_OFST)) |
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#define | ALT_UART_STET_STET_E_FIFOEMPTY 0x0 |
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#define | ALT_UART_STET_STET_E_TWOCHARS 0x1 |
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#define | ALT_UART_STET_STET_E_QUARTERFULL 0x2 |
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#define | ALT_UART_STET_STET_E_HALFFULL 0x3 |
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#define | ALT_UART_STET_STET_LSB 0 |
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#define | ALT_UART_STET_STET_MSB 1 |
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#define | ALT_UART_STET_STET_WIDTH 2 |
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#define | ALT_UART_STET_STET_SET_MSK 0x00000003 |
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#define | ALT_UART_STET_STET_CLR_MSK 0xfffffffc |
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#define | ALT_UART_STET_STET_RESET 0x0 |
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#define | ALT_UART_STET_STET_GET(value) (((value) & 0x00000003) >> 0) |
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#define | ALT_UART_STET_STET_SET(value) (((value) << 0) & 0x00000003) |
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#define | ALT_UART_STET_OFST 0xa0 |
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#define | ALT_UART_STET_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_STET_OFST)) |
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#define | ALT_UART_HTX_HTX_E_DISD 0x0 |
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#define | ALT_UART_HTX_HTX_E_END 0x1 |
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#define | ALT_UART_HTX_HTX_LSB 0 |
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#define | ALT_UART_HTX_HTX_MSB 0 |
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#define | ALT_UART_HTX_HTX_WIDTH 1 |
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#define | ALT_UART_HTX_HTX_SET_MSK 0x00000001 |
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#define | ALT_UART_HTX_HTX_CLR_MSK 0xfffffffe |
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#define | ALT_UART_HTX_HTX_RESET 0x0 |
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#define | ALT_UART_HTX_HTX_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_HTX_HTX_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_HTX_OFST 0xa4 |
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#define | ALT_UART_HTX_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_HTX_OFST)) |
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#define | ALT_UART_DMASA_DMASA_LSB 0 |
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#define | ALT_UART_DMASA_DMASA_MSB 0 |
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#define | ALT_UART_DMASA_DMASA_WIDTH 1 |
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#define | ALT_UART_DMASA_DMASA_SET_MSK 0x00000001 |
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#define | ALT_UART_DMASA_DMASA_CLR_MSK 0xfffffffe |
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#define | ALT_UART_DMASA_DMASA_RESET 0x0 |
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#define | ALT_UART_DMASA_DMASA_GET(value) (((value) & 0x00000001) >> 0) |
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#define | ALT_UART_DMASA_DMASA_SET(value) (((value) << 0) & 0x00000001) |
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#define | ALT_UART_DMASA_OFST 0xa8 |
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#define | ALT_UART_DMASA_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_DMASA_OFST)) |
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#define | ALT_UART_CPR_APBDATAWIDTH_E_WIDTH32BITS 0x2 |
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#define | ALT_UART_CPR_APBDATAWIDTH_LSB 0 |
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#define | ALT_UART_CPR_APBDATAWIDTH_MSB 1 |
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#define | ALT_UART_CPR_APBDATAWIDTH_WIDTH 2 |
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#define | ALT_UART_CPR_APBDATAWIDTH_SET_MSK 0x00000003 |
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#define | ALT_UART_CPR_APBDATAWIDTH_CLR_MSK 0xfffffffc |
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#define | ALT_UART_CPR_APBDATAWIDTH_RESET 0x2 |
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#define | ALT_UART_CPR_APBDATAWIDTH_GET(value) (((value) & 0x00000003) >> 0) |
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#define | ALT_UART_CPR_APBDATAWIDTH_SET(value) (((value) << 0) & 0x00000003) |
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#define | ALT_UART_CPR_AFCE_MOD_E_END 0x1 |
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#define | ALT_UART_CPR_AFCE_MOD_LSB 4 |
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#define | ALT_UART_CPR_AFCE_MOD_MSB 4 |
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#define | ALT_UART_CPR_AFCE_MOD_WIDTH 1 |
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#define | ALT_UART_CPR_AFCE_MOD_SET_MSK 0x00000010 |
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#define | ALT_UART_CPR_AFCE_MOD_CLR_MSK 0xffffffef |
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#define | ALT_UART_CPR_AFCE_MOD_RESET 0x1 |
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#define | ALT_UART_CPR_AFCE_MOD_GET(value) (((value) & 0x00000010) >> 4) |
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#define | ALT_UART_CPR_AFCE_MOD_SET(value) (((value) << 4) & 0x00000010) |
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#define | ALT_UART_CPR_THRE_MOD_E_END 0x1 |
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#define | ALT_UART_CPR_THRE_MOD_LSB 5 |
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#define | ALT_UART_CPR_THRE_MOD_MSB 5 |
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#define | ALT_UART_CPR_THRE_MOD_WIDTH 1 |
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#define | ALT_UART_CPR_THRE_MOD_SET_MSK 0x00000020 |
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#define | ALT_UART_CPR_THRE_MOD_CLR_MSK 0xffffffdf |
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#define | ALT_UART_CPR_THRE_MOD_RESET 0x1 |
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#define | ALT_UART_CPR_THRE_MOD_GET(value) (((value) & 0x00000020) >> 5) |
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#define | ALT_UART_CPR_THRE_MOD_SET(value) (((value) << 5) & 0x00000020) |
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#define | ALT_UART_CPR_SIR_MOD_E_DISD 0x0 |
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#define | ALT_UART_CPR_SIR_MOD_LSB 6 |
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#define | ALT_UART_CPR_SIR_MOD_MSB 6 |
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#define | ALT_UART_CPR_SIR_MOD_WIDTH 1 |
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#define | ALT_UART_CPR_SIR_MOD_SET_MSK 0x00000040 |
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#define | ALT_UART_CPR_SIR_MOD_CLR_MSK 0xffffffbf |
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#define | ALT_UART_CPR_SIR_MOD_RESET 0x0 |
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#define | ALT_UART_CPR_SIR_MOD_GET(value) (((value) & 0x00000040) >> 6) |
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#define | ALT_UART_CPR_SIR_MOD_SET(value) (((value) << 6) & 0x00000040) |
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#define | ALT_UART_CPR_SIR_LP_MOD_E_DISD 0x0 |
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#define | ALT_UART_CPR_SIR_LP_MOD_LSB 7 |
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#define | ALT_UART_CPR_SIR_LP_MOD_MSB 7 |
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#define | ALT_UART_CPR_SIR_LP_MOD_WIDTH 1 |
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#define | ALT_UART_CPR_SIR_LP_MOD_SET_MSK 0x00000080 |
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#define | ALT_UART_CPR_SIR_LP_MOD_CLR_MSK 0xffffff7f |
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#define | ALT_UART_CPR_SIR_LP_MOD_RESET 0x0 |
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#define | ALT_UART_CPR_SIR_LP_MOD_GET(value) (((value) & 0x00000080) >> 7) |
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#define | ALT_UART_CPR_SIR_LP_MOD_SET(value) (((value) << 7) & 0x00000080) |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_E_END 0x1 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_LSB 8 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_MSB 8 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_WIDTH 1 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_SET_MSK 0x00000100 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_CLR_MSK 0xfffffeff |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_RESET 0x1 |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_GET(value) (((value) & 0x00000100) >> 8) |
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#define | ALT_UART_CPR_ADDITIONAL_FEAT_SET(value) (((value) << 8) & 0x00000100) |
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#define | ALT_UART_CPR_FIFO_ACCESS_E_END 0x1 |
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#define | ALT_UART_CPR_FIFO_ACCESS_LSB 9 |
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#define | ALT_UART_CPR_FIFO_ACCESS_MSB 9 |
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#define | ALT_UART_CPR_FIFO_ACCESS_WIDTH 1 |
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#define | ALT_UART_CPR_FIFO_ACCESS_SET_MSK 0x00000200 |
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#define | ALT_UART_CPR_FIFO_ACCESS_CLR_MSK 0xfffffdff |
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#define | ALT_UART_CPR_FIFO_ACCESS_RESET 0x1 |
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#define | ALT_UART_CPR_FIFO_ACCESS_GET(value) (((value) & 0x00000200) >> 9) |
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#define | ALT_UART_CPR_FIFO_ACCESS_SET(value) (((value) << 9) & 0x00000200) |
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#define | ALT_UART_CPR_FIFO_STAT_E_END 0x1 |
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#define | ALT_UART_CPR_FIFO_STAT_LSB 10 |
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#define | ALT_UART_CPR_FIFO_STAT_MSB 10 |
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#define | ALT_UART_CPR_FIFO_STAT_WIDTH 1 |
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#define | ALT_UART_CPR_FIFO_STAT_SET_MSK 0x00000400 |
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#define | ALT_UART_CPR_FIFO_STAT_CLR_MSK 0xfffffbff |
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#define | ALT_UART_CPR_FIFO_STAT_RESET 0x1 |
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#define | ALT_UART_CPR_FIFO_STAT_GET(value) (((value) & 0x00000400) >> 10) |
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#define | ALT_UART_CPR_FIFO_STAT_SET(value) (((value) << 10) & 0x00000400) |
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#define | ALT_UART_CPR_SHADOW_E_END 0x1 |
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#define | ALT_UART_CPR_SHADOW_LSB 11 |
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#define | ALT_UART_CPR_SHADOW_MSB 11 |
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#define | ALT_UART_CPR_SHADOW_WIDTH 1 |
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#define | ALT_UART_CPR_SHADOW_SET_MSK 0x00000800 |
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#define | ALT_UART_CPR_SHADOW_CLR_MSK 0xfffff7ff |
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#define | ALT_UART_CPR_SHADOW_RESET 0x1 |
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#define | ALT_UART_CPR_SHADOW_GET(value) (((value) & 0x00000800) >> 11) |
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#define | ALT_UART_CPR_SHADOW_SET(value) (((value) << 11) & 0x00000800) |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_E_END 0x1 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_LSB 12 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_MSB 12 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_WIDTH 1 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_SET_MSK 0x00001000 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_CLR_MSK 0xffffefff |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_RESET 0x1 |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_GET(value) (((value) & 0x00001000) >> 12) |
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#define | ALT_UART_CPR_UART_ADD_ENC_PARAM_SET(value) (((value) << 12) & 0x00001000) |
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#define | ALT_UART_CPR_DMA_EXTRA_E_END 0x1 |
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#define | ALT_UART_CPR_DMA_EXTRA_LSB 13 |
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#define | ALT_UART_CPR_DMA_EXTRA_MSB 13 |
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#define | ALT_UART_CPR_DMA_EXTRA_WIDTH 1 |
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#define | ALT_UART_CPR_DMA_EXTRA_SET_MSK 0x00002000 |
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#define | ALT_UART_CPR_DMA_EXTRA_CLR_MSK 0xffffdfff |
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#define | ALT_UART_CPR_DMA_EXTRA_RESET 0x1 |
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#define | ALT_UART_CPR_DMA_EXTRA_GET(value) (((value) & 0x00002000) >> 13) |
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#define | ALT_UART_CPR_DMA_EXTRA_SET(value) (((value) << 13) & 0x00002000) |
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#define | ALT_UART_CPR_FIFO_MOD_E_FIFO128BYTES 0x80 |
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#define | ALT_UART_CPR_FIFO_MOD_LSB 16 |
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#define | ALT_UART_CPR_FIFO_MOD_MSB 23 |
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#define | ALT_UART_CPR_FIFO_MOD_WIDTH 8 |
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#define | ALT_UART_CPR_FIFO_MOD_SET_MSK 0x00ff0000 |
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#define | ALT_UART_CPR_FIFO_MOD_CLR_MSK 0xff00ffff |
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#define | ALT_UART_CPR_FIFO_MOD_RESET 0x37 |
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#define | ALT_UART_CPR_FIFO_MOD_GET(value) (((value) & 0x00ff0000) >> 16) |
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#define | ALT_UART_CPR_FIFO_MOD_SET(value) (((value) << 16) & 0x00ff0000) |
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#define | ALT_UART_CPR_OFST 0xf4 |
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#define | ALT_UART_CPR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CPR_OFST)) |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_LSB 0 |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_MSB 31 |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_WIDTH 32 |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_SET_MSK 0xffffffff |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_CLR_MSK 0x00000000 |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_RESET 0x3331312a |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_GET(value) (((value) & 0xffffffff) >> 0) |
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#define | ALT_UART_UCV_UART_COMPONENT_VER_SET(value) (((value) << 0) & 0xffffffff) |
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#define | ALT_UART_UCV_OFST 0xf8 |
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#define | ALT_UART_UCV_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_UCV_OFST)) |
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#define | ALT_UART_CTR_PERIPHERAL_ID_LSB 0 |
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#define | ALT_UART_CTR_PERIPHERAL_ID_MSB 31 |
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#define | ALT_UART_CTR_PERIPHERAL_ID_WIDTH 32 |
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#define | ALT_UART_CTR_PERIPHERAL_ID_SET_MSK 0xffffffff |
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#define | ALT_UART_CTR_PERIPHERAL_ID_CLR_MSK 0x00000000 |
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#define | ALT_UART_CTR_PERIPHERAL_ID_RESET 0x44570110 |
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#define | ALT_UART_CTR_PERIPHERAL_ID_GET(value) (((value) & 0xffffffff) >> 0) |
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#define | ALT_UART_CTR_PERIPHERAL_ID_SET(value) (((value) << 0) & 0xffffffff) |
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#define | ALT_UART_CTR_OFST 0xfc |
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#define | ALT_UART_CTR_ADDR(base) ALT_CAST(void *, (ALT_CAST(char *, (base)) + ALT_UART_CTR_OFST)) |
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