|
|
uint32_t | GCR0 |
| |
|
uint32_t | GCR1 |
| |
|
uint32_t | INT0 |
| |
|
uint32_t | LVL |
| |
|
uint32_t | FLG |
| |
|
uint32_t | PC0 |
| |
|
uint32_t | PC1 |
| |
|
uint32_t | PC2 |
| |
|
uint32_t | PC3 |
| |
|
uint32_t | PC4 |
| |
|
uint32_t | PC5 |
| |
|
uint32_t | PC6 |
| |
|
uint32_t | PC7 |
| |
|
uint32_t | PC8 |
| |
|
uint32_t | DAT0 |
| |
|
uint32_t | DAT1 |
| |
|
uint32_t | BUF |
| |
|
uint32_t | EMU |
| |
|
uint32_t | DELAY |
| |
|
uint32_t | DEF |
| |
|
uint32_t | FMT0 |
| |
|
uint32_t | FMT1 |
| |
|
uint32_t | FMT2 |
| |
|
uint32_t | FMT3 |
| |
|
uint32_t | INTVECT0 |
| |
|
uint32_t | INTVECT1 |
| |
|
uint8_t | reserved1 [4] |
| |
|
uint32_t | PMCTRL |
| |
|
uint32_t | MIBSPIE |
| |
|
uint32_t | TGITENST |
| |
|
uint32_t | TGITENCR |
| |
|
uint32_t | TGITLVST |
| |
|
uint32_t | TGITLVCR |
| |
|
uint32_t | TGINTFLG |
| |
|
uint8_t | reserved2 [8] |
| |
|
uint32_t | TICKCNT |
| |
|
uint32_t | LTGPEND |
| |
|
uint32_t | TGCTRL [16] |
| |
|
uint32_t | DMACTRL [8] |
| |
|
uint32_t | DMACOUNT [8] |
| |
|
uint32_t | DMACNTLEN |
| |
|
uint8_t | reserved3 [4] |
| |
|
uint32_t | UERRCTRL |
| |
|
uint32_t | UERRSTAT |
| |
|
uint32_t | UERRADDRRX |
| |
|
uint32_t | UERRADDRTX |
| |
|
uint32_t | RXOVRN_BUF_ADDR |
| |
|
uint32_t | IOLPBKTSTCR |
| |
|
uint32_t | EXT_PRESCALE1 |
| |
|
uint32_t | EXT_PRESCALE2 |
| |
The documentation for this struct was generated from the following file:
- bsps/arm/tms570/include/bsp/ti_herc/reg_spi.h