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RTEMS 6.1
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This header file defines the FTMCTRL register block interface. More...
#include <stdint.h>Go to the source code of this file.
Data Structures | |
| struct | ftmctrl |
| This structure defines the FTMCTRL register block memory map. More... | |
Macros | |
| #define | FTMCTRL_MCFG1_PBRDY 0x40000000U |
| #define | FTMCTRL_MCFG1_ABRDY 0x20000000U |
| #define | FTMCTRL_MCFG1_IOBUSW_SHIFT 27 |
| #define | FTMCTRL_MCFG1_IOBUSW_MASK 0x18000000U |
| #define | FTMCTRL_MCFG1_IOBUSW_GET(_reg) |
| #define | FTMCTRL_MCFG1_IOBUSW_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_IOBUSW(_val) |
| #define | FTMCTRL_MCFG1_IBRDY 0x4000000U |
| #define | FTMCTRL_MCFG1_BEXCN 0x2000000U |
| #define | FTMCTRL_MCFG1_IO_WAITSTATES_SHIFT 20 |
| #define | FTMCTRL_MCFG1_IO_WAITSTATES_MASK 0xf00000U |
| #define | FTMCTRL_MCFG1_IO_WAITSTATES_GET(_reg) |
| #define | FTMCTRL_MCFG1_IO_WAITSTATES_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_IO_WAITSTATES(_val) |
| #define | FTMCTRL_MCFG1_IOEN 0x80000U |
| #define | FTMCTRL_MCFG1_R 0x40000U |
| #define | FTMCTRL_MCFG1_ROMBANKSZ_SHIFT 14 |
| #define | FTMCTRL_MCFG1_ROMBANKSZ_MASK 0x3c000U |
| #define | FTMCTRL_MCFG1_ROMBANKSZ_GET(_reg) |
| #define | FTMCTRL_MCFG1_ROMBANKSZ_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_ROMBANKSZ(_val) |
| #define | FTMCTRL_MCFG1_PWEN 0x800U |
| #define | FTMCTRL_MCFG1_PROM_WIDTH_SHIFT 8 |
| #define | FTMCTRL_MCFG1_PROM_WIDTH_MASK 0x300U |
| #define | FTMCTRL_MCFG1_PROM_WIDTH_GET(_reg) |
| #define | FTMCTRL_MCFG1_PROM_WIDTH_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_PROM_WIDTH(_val) |
| #define | FTMCTRL_MCFG1_PROM_WRITE_WS_SHIFT 4 |
| #define | FTMCTRL_MCFG1_PROM_WRITE_WS_MASK 0xf0U |
| #define | FTMCTRL_MCFG1_PROM_WRITE_WS_GET(_reg) |
| #define | FTMCTRL_MCFG1_PROM_WRITE_WS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_PROM_WRITE_WS(_val) |
| #define | FTMCTRL_MCFG1_PROM_READ_WS_SHIFT 0 |
| #define | FTMCTRL_MCFG1_PROM_READ_WS_MASK 0xfU |
| #define | FTMCTRL_MCFG1_PROM_READ_WS_GET(_reg) |
| #define | FTMCTRL_MCFG1_PROM_READ_WS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG1_PROM_READ_WS(_val) |
| #define | FTMCTRL_MCFG3_ME 0x8000000U |
| #define | FTMCTRL_MCFG3_WB 0x800U |
| #define | FTMCTRL_MCFG3_RB 0x400U |
| #define | FTMCTRL_MCFG3_PE 0x100U |
| #define | FTMCTRL_MCFG3_TCB_SHIFT 0 |
| #define | FTMCTRL_MCFG3_TCB_MASK 0xffU |
| #define | FTMCTRL_MCFG3_TCB_GET(_reg) |
| #define | FTMCTRL_MCFG3_TCB_SET(_reg, _val) |
| #define | FTMCTRL_MCFG3_TCB(_val) |
| #define | FTMCTRL_MCFG5_IOHWS_SHIFT 23 |
| #define | FTMCTRL_MCFG5_IOHWS_MASK 0x3f800000U |
| #define | FTMCTRL_MCFG5_IOHWS_GET(_reg) |
| #define | FTMCTRL_MCFG5_IOHWS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG5_IOHWS(_val) |
| #define | FTMCTRL_MCFG5_ROMHWS_SHIFT 7 |
| #define | FTMCTRL_MCFG5_ROMHWS_MASK 0x3f80U |
| #define | FTMCTRL_MCFG5_ROMHWS_GET(_reg) |
| #define | FTMCTRL_MCFG5_ROMHWS_SET(_reg, _val) |
| #define | FTMCTRL_MCFG5_ROMHWS(_val) |
| #define | FTMCTRL_MCFG7_BRDYNCNT_SHIFT 16 |
| #define | FTMCTRL_MCFG7_BRDYNCNT_MASK 0xffff0000U |
| #define | FTMCTRL_MCFG7_BRDYNCNT_GET(_reg) |
| #define | FTMCTRL_MCFG7_BRDYNCNT_SET(_reg, _val) |
| #define | FTMCTRL_MCFG7_BRDYNCNT(_val) |
| #define | FTMCTRL_MCFG7_BRDYNRLD_SHIFT 0 |
| #define | FTMCTRL_MCFG7_BRDYNRLD_MASK 0xffffU |
| #define | FTMCTRL_MCFG7_BRDYNRLD_GET(_reg) |
| #define | FTMCTRL_MCFG7_BRDYNRLD_SET(_reg, _val) |
| #define | FTMCTRL_MCFG7_BRDYNRLD(_val) |
Typedefs | |
| typedef struct ftmctrl | ftmctrl |
| This structure defines the FTMCTRL register block memory map. | |
This header file defines the FTMCTRL register block interface.