30#ifndef _SAME70_TRNG_COMPONENT_
31#define _SAME70_TRNG_COMPONENT_
39#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
43 __I uint32_t Reserved1[3];
48 __I uint32_t Reserved2[12];
53#define TRNG_CR_ENABLE (0x1u << 0)
54#define TRNG_CR_KEY_Pos 8
55#define TRNG_CR_KEY_Msk (0xffffffu << TRNG_CR_KEY_Pos)
56#define TRNG_CR_KEY(value) ((TRNG_CR_KEY_Msk & ((value) << TRNG_CR_KEY_Pos)))
57#define TRNG_CR_KEY_PASSWD (0x524E47u << 8)
59#define TRNG_IER_DATRDY (0x1u << 0)
61#define TRNG_IDR_DATRDY (0x1u << 0)
63#define TRNG_IMR_DATRDY (0x1u << 0)
65#define TRNG_ISR_DATRDY (0x1u << 0)
67#define TRNG_ODATA_ODATA_Pos 0
68#define TRNG_ODATA_ODATA_Msk (0xffffffffu << TRNG_ODATA_ODATA_Pos)
#define __O
Definition: core_cm7.h:286
#define __I
Definition: core_cm7.h:284
Trng hardware registers.
Definition: component_trng.h:41
__O uint32_t TRNG_CR
(Trng Offset: 0x00) Control Register
Definition: component_trng.h:42
__O uint32_t TRNG_IDR
(Trng Offset: 0x14) Interrupt Disable Register
Definition: component_trng.h:45
__O uint32_t TRNG_IER
(Trng Offset: 0x10) Interrupt Enable Register
Definition: component_trng.h:44
__I uint32_t TRNG_IMR
(Trng Offset: 0x18) Interrupt Mask Register
Definition: component_trng.h:46
__I uint32_t TRNG_ODATA
(Trng Offset: 0x50) Output Data Register
Definition: component_trng.h:49
__I uint32_t TRNG_ISR
(Trng Offset: 0x1C) Interrupt Status Register
Definition: component_trng.h:47