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RTEMS 5.2
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40#ifndef _DISCOVERY_DEV_GTREG_H_
41#define _DISCOVERY_DEV_GTREG_H_
43#define GT__BIT(bit) (1U << (bit))
44#define GT__MASK(bit) (GT__BIT(bit) - 1)
45#define GT__EXT(data, bit, len) (((data) >> (bit)) & GT__MASK(len))
46#define GT__CLR(data, bit, len) ((data) &= ~(GT__MASK(len) << (bit)))
47#define GT__INS(new, bit) ((new) << (bit))
53#define GT_SCS0_Low_Decode 0x0008
54#define GT_SCS0_High_Decode 0x0010
55#define GT_SCS1_Low_Decode 0x0208
56#define GT_SCS1_High_Decode 0x0210
57#define GT_SCS2_Low_Decode 0x0018
58#define GT_SCS2_High_Decode 0x0020
59#define GT_SCS3_Low_Decode 0x0218
60#define GT_SCS3_High_Decode 0x0220
61#define GT_CS0_Low_Decode 0x0028
62#define GT_CS0_High_Decode 0x0030
63#define GT_CS1_Low_Decode 0x0228
64#define GT_CS1_High_Decode 0x0230
65#define GT_CS2_Low_Decode 0x0248
66#define GT_CS2_High_Decode 0x0250
67#define GT_CS3_Low_Decode 0x0038
68#define GT_CS3_High_Decode 0x0040
69#define GT_BootCS_Low_Decode 0x0238
70#define GT_BootCS_High_Decode 0x0240
71#define GT_PCI0_IO_Low_Decode 0x0048
72#define GT_PCI0_IO_High_Decode 0x0050
73#define GT_PCI0_Mem0_Low_Decode 0x0058
74#define GT_PCI0_Mem0_High_Decode 0x0060
75#define GT_PCI0_Mem1_Low_Decode 0x0080
76#define GT_PCI0_Mem1_High_Decode 0x0088
77#define GT_PCI0_Mem2_Low_Decode 0x0258
78#define GT_PCI0_Mem2_High_Decode 0x0260
79#define GT_PCI0_Mem3_Low_Decode 0x0280
80#define GT_PCI0_Mem3_High_Decode 0x0288
81#define GT_PCI1_IO_Low_Decode 0x0090
82#define GT_PCI1_IO_High_Decode 0x0098
83#define GT_PCI1_Mem0_Low_Decode 0x00a0
84#define GT_PCI1_Mem0_High_Decode 0x00a8
85#define GT_PCI1_Mem1_Low_Decode 0x00b0
86#define GT_PCI1_Mem1_High_Decode 0x00b8
87#define GT_PCI1_Mem2_Low_Decode 0x02a0
88#define GT_PCI1_Mem2_High_Decode 0x02a8
89#define GT_PCI1_Mem3_Low_Decode 0x02b0
90#define GT_PCI1_Mem3_High_Decode 0x02b8
91#define GT_Internal_Decode 0x0068
92#define GT_CPU0_Low_Decode 0x0290
93#define GT_CPU0_High_Decode 0x0298
94#define GT_CPU1_Low_Decode 0x02c0
95#define GT_CPU1_High_Decode 0x02c8
96#define GT_PCI0_IO_Remap 0x00f0
97#define GT_PCI0_Mem0_Remap_Low 0x00f8
98#define GT_PCI0_Mem0_Remap_High 0x0320
99#define GT_PCI0_Mem1_Remap_Low 0x0100
100#define GT_PCI0_Mem1_Remap_High 0x0328
101#define GT_PCI0_Mem2_Remap_Low 0x02f8
102#define GT_PCI0_Mem2_Remap_High 0x0330
103#define GT_PCI0_Mem3_Remap_Low 0x0300
104#define GT_PCI0_Mem3_Remap_High 0x0338
105#define GT_PCI1_IO_Remap 0x0108
106#define GT_PCI1_Mem0_Remap_Low 0x0110
107#define GT_PCI1_Mem0_Remap_High 0x0340
108#define GT_PCI1_Mem1_Remap_Low 0x0118
109#define GT_PCI1_Mem1_Remap_High 0x0348
110#define GT_PCI1_Mem2_Remap_Low 0x0310
111#define GT_PCI1_Mem2_Remap_High 0x0350
112#define GT_PCI1_Mem3_Remap_Low 0x0318
113#define GT_PCI1_Mem3_Remap_High 0x0358
119#define GT_CPU_Cfg 0x0000
120#define GT_CPU_Mode 0x0120
121#define GT_CPU_Master_Ctl 0x0160
122#define GT_CPU_If_Xbar_Ctl_Low 0x0150
123#define GT_CPU_If_Xbar_Ctl_High 0x0158
124#define GT_CPU_If_Xbar_Timeout 0x0168
125#define GT_CPU_Rd_Rsp_Xbar_Ctl_Low 0x0170
126#define GT_CPU_Rd_Rsp_Xbar_Ctl_High 0x0178
131#define GT_PCI_Sync_Barrier(bus) (0x00c0 | ((bus) << 3))
132#define GT_PCI0_Sync_Barrier 0x00c0
133#define GT_PCI1_Sync_Barrier 0x00c8
138#define GT_Protect_Low_0 0x0180
139#define GT_Protect_High_0 0x0188
140#define GT_Protect_Low_1 0x0190
141#define GT_Protect_High_1 0x0198
142#define GT_Protect_Low_2 0x01a0
143#define GT_Protect_High_2 0x01a8
144#define GT_Protect_Low_3 0x01b0
145#define GT_Protect_High_3 0x01b8
146#define GT_Protect_Low_4 0x01c0
147#define GT_Protect_High_4 0x01c8
148#define GT_Protect_Low_5 0x01d0
149#define GT_Protect_High_5 0x01d8
150#define GT_Protect_Low_6 0x01e0
151#define GT_Protect_High_6 0x01e8
152#define GT_Protect_Low_7 0x01f0
153#define GT_Protect_High_7 0x01f8
158#define GT_Snoop_Base_0 0x0380
159#define GT_Snoop_Top_0 0x0388
160#define GT_Snoop_Base_1 0x0390
161#define GT_Snoop_Top_1 0x0398
162#define GT_Snoop_Base_2 0x03a0
163#define GT_Snoop_Top_2 0x03a8
164#define GT_Snoop_Base_3 0x03b0
165#define GT_Snoop_Top_3 0x03b8
170#define GT_CPU_Error_Address_Low 0x0070
171#define GT_CPU_Error_Address_High 0x0078
172#define GT_CPU_Error_Data_Low 0x0128
173#define GT_CPU_Error_Data_High 0x0130
174#define GT_CPU_Error_Parity 0x0138
175#define GT_CPU_Error_Cause 0x0140
176#define GT_CPU_Error_Mask 0x0148
178#define GT_DecodeAddr_SET(g, r, v) \
180 gt_read((g), GT_Internal_Decode); \
181 gt_write((g), (r), ((v) & 0xfff00000) >> 20); \
182 while ((gt_read((g), (r)) & 0xfff) != ((v) >> 20)); \
185#define GT_LowAddr_GET(v) (GT__EXT((v), 0, 12) << 20)
186#define GT_HighAddr_GET(v) ((GT__EXT((v), 0, 12) << 20) | 0xfffff)
188#define GT_MPP_Control0 0xf000
189#define GT_MPP_Control1 0xf004
190#define GT_MPP_Control2 0xf008
191#define GT_MPP_Control3 0xf00c
194#define GT_MPP_SerialPortMultiplex 0xf010
196#define GT_GPP_IO_Control 0xf100
197#define GT_GPP_Level_Control 0xf110
198#define GT_GPP_Value 0xf104
199#define GT_GPP_Interrupt_Cause 0xf108
200#define GT_GPP_Interrupt_Mask 0xf10c
259#define GT_PCISwap_GET(v) GT__EXT((v), 24, 3)
260#define GT_PCISwap_ByteSwap 0
261#define GT_PCISwap_NoSwap 1
262#define GT_PCISwap_ByteWordSwap 2
263#define GT_PCISwap_WordSwap 3
264#define GT_PCI_LowDecode_PCIReq64 GT__BIT(27)
387#define GT_CPUCfg_NoMatchCnt_GET(v) GT__EXT((v), 0, 8)
388#define GT_CPUCfg_NoMatchCntEn GT__BIT( 9)
389#define GT_CPUCfg_NoMatchCntExt GT__BIT(10)
390#define GT_CPUCfg_AACKDelay GT__BIT(11)
391#define GT_CPUCfg_Endianess GT__BIT(12)
392#define GT_CPUCfg_Pipeline GT__BIT(13)
393#define GT_CPUCfg_TADelay GT__BIT(15)
394#define GT_CPUCfg_RdOOO GT__BIT(16)
395#define GT_CPUCfg_StopRetry GT__BIT(17)
396#define GT_CPUCfg_MultiGTDec GT__BIT(18)
397#define GT_CPUCfg_DPValid GT__BIT(19)
398#define GT_CPUCfg_PErrProp GT__BIT(22)
399#define GT_CPUCfg_APValid GT__BIT(26)
400#define GT_CPUCfg_RemapWrDis GT__BIT(27)
401#define GT_CPUCfg_ConfSBDis GT__BIT(28)
402#define GT_CPUCfg_IOSBDis GT__BIT(29)
403#define GT_CPUCfg_ClkSync GT__BIT(30)
419#define GT_CPUMode_MultiGTID_GET(v) GT__EXT(v, 0, 2)
420#define GT_CPUMode_MultiGT GT__BIT(2)
421#define GT_CPUMode_RetryEn GT__BIT(3)
422#define GT_CPUMode_CPUType_GET(v) GT__EXT(v, 4, 4)
454#define GT_CPUMstrCtl_IntArb GT__BIT(8)
455#define GT_CPUMstrCtl_IntBusCtl GT__BIT(9)
456#define GT_CPUMstrCtl_MWrTrig GT__BIT(10)
457#define GT_CPUMstrCtl_MRdTrig GT__BIT(11)
458#define GT_CPUMstrCtl_CleanBlock GT__BIT(12)
459#define GT_CPUMstrCtl_FlushBlock GT__BIT(13)
461#define GT_ArbSlice_SDRAM 0x0
462#define GT_ArbSlice_DEVICE 0x1
463#define GT_ArbSlice_NULL 0x2
464#define GT_ArbSlice_PCI0 0x3
465#define GT_ArbSlice_PCI1 0x4
466#define GT_ArbSlice_COMM 0x5
467#define GT_ArbSlice_IDMA0123 0x6
468#define GT_ArbSlice_IDMA4567 0x7
473#define GT_XbarCtl_GET_ArbSlice(v, n) GT__EXT((v), (((n) & 7)*4, 4)
561#define GT_CPU_AccProtect GT__BIT(16)
562#define GT_CPU_WrProtect GT__BIT(17)
563#define GT_CPU_CacheProtect GT__BIT(18)
595#define GT_Snoop_GET(v) GT__EXT((v), 16, 2)
596#define GT_Snoop_INS(v) GT__INS((v), 16)
597#define GT_Snoop_None 0
638#define GT_CPUErrorAddrHigh_ErrPar_GET(v) GT__EXT((v), 4, 4)
661#define GT_CPUErrorParity_PErrPar_GET(v) GT__EXT((v), 0, 8)
692#define GT_CPUError_AddrOut GT__BIT(GT_CPUError_Sel_AddrOut)
693#define GT_CPUError_AddrPErr GT__BIT(GT_CPUError_Sel_AddrPErr)
694#define GT_CPUError_TTErr GT__BIT(GT_CPUError_Sel_TTErr)
695#define GT_CPUError_AccErr GT__BIT(GT_CPUError_Sel_AccErr)
696#define GT_CPUError_WrErr GT__BIT(GT_CPUError_Sel_WrPErr)
697#define GT_CPUError_CacheErr GT__BIT(GT_CPUError_Sel_CachePErr)
698#define GT_CPUError_WrDataPErr GT__BIT(GT_CPUError_Sel_WrDataPErr)
699#define GT_CPUError_RdDataPErr GT__BIT(GT_CPUError_Sel_RdDataPErr)
701#define GT_CPUError_Sel_AddrOut 0
702#define GT_CPUError_Sel_AddrPErr 1
703#define GT_CPUError_Sel_TTErr 2
704#define GT_CPUError_Sel_AccErr 3
705#define GT_CPUError_Sel_WrErr 4
706#define GT_CPUError_Sel_CacheErr 5
707#define GT_CPUError_Sel_WrDataPErr 6
708#define GT_CPUError_Sel_RdDataPErr 7
710#define GT_CPUError_Sel_GET(v) GT__EXT((v), 27, 5)
726#define GT_CommUnitArb_Ctrl 0xf300
730#define GT_CommUnitIntr_Cause 0xf310
731#define GT_CommUnitIntr_Mask 0xf314
732#define GT_CommUnitIntr_ErrAddr 0xf318
734#define GT_CommUnitIntr_E0 0x00000007
735#define GT_CommUnitIntr_E1 0x00000070
736#define GT_CommUnitIntr_E2 0x00000700
737#define GT_CommUnitIntr_S0 0x00070000
738#define GT_CommUnitIntr_S1 0x00700000
739#define GT_CommUnitIntr_Sel 0x70000000
744#define GT_ECC_Data_Lo 0x484
745#define GT_ECC_Data_Hi 0x480
746#define GT_ECC_Addr 0x490
747#define GT_ECC_Rec 0x488
748#define GT_ECC_Calc 0x48c
749#define GT_ECC_Ctl 0x494
750#define GT_ECC_Count 0x498
755#define GT_WDOG_Config 0xb410
756#define GT_WDOG_Value 0xb414
757#define GT_WDOG_Value_NMI GT__MASK(24)
758#define GT_WDOG_Config_Preset GT__MASK(24)
759#define GT_WDOG_Config_Ctl1a GT__BIT(24)
760#define GT_WDOG_Config_Ctl1b GT__BIT(25)
761#define GT_WDOG_Config_Ctl2a GT__BIT(26)
762#define GT_WDOG_Config_Ctl2b GT__BIT(27)
763#define GT_WDOG_Config_Enb GT__BIT(31)
765#define GT_WDOG_NMI_DFLT (GT__MASK(24) & GT_WDOG_Value_NMI)
766#define GT_WDOG_Preset_DFLT (GT__MASK(22) & GT_WDOG_Config_Preset)
771#define GT_DEVBUS_ICAUSE 0x4d0
772#define GT_DEVBUS_IMASK 0x4d4
773#define GT_DEVBUS_ERR_ADDR 0x4d8
778#define GT_DEVBUS_DBurstErr GT__BIT(0)
779#define GT_DEVBUS_DRdyErr GT__BIT(1)
780#define GT_DEVBUS_Sel GT__BIT(27)
781#define GT_DEVBUS_RES ~(GT_DEVBUS_DBurstErr|GT_DEVBUS_DRdyErr|GT_DEVBUS_Sel)
784#define TWSI_SLV_ADDR 0xc000
785#define TWSI_EXT_SLV_ADDR 0xc010
786#define TWSI_DATA 0xc004
787#define TWSI_CTRL 0xc008
788#define TWSI_STATUS 0xc00c
789#define TWSI_BAUDE_RATE 0xc00c
790#define TWSI_SFT_RST 0xc01c
794#define GT64260_MAIN_INT_CAUSE_LO 0xc18
795#define GT64260_MAIN_INT_CAUSE_HI 0xc68
796#define GT64260_CPU_INT_MASK_LO 0xc1c
797#define GT64260_CPU_INT_MASK_HI 0xc6c
798#define GT64260_CPU_SEL_CAUSE 0xc70
799#define GT_PCI0_INT_MASK_LO 0xc24
800#define GT_PCI0_INT_MASK_HI 0xc64
801#define GT_PCI0_SEL_CAUSE 0xc74
802#define GT_PCI1_INT_MASK_LO 0xca4
803#define GT_PCI1_INT_MASK_HI 0xce4
804#define GT_PCI1_SEL_CAUSE 0xcf4
805#define GT_CPU_INT0_MASK 0xe60
806#define GT_CPU_INT1_MASK 0xe64
807#define GT_CPU_INT2_MASK 0xe68
808#define GT_CPU_INT3_MASK 0xe6c