38#ifndef LIBCPU_POWERPC_MPC55XX_H
39#define LIBCPU_POWERPC_MPC55XX_H
50int mpc55xx_flash_copy(
void *dest,
const void *src,
size_t nbytes);
51int mpc55xx_flash_copy_op(
void *rdest,
const void *src,
size_t nbytes,
52 uint32_t opmask, uint32_t *p_fail_addr);
53int mpc55xx_flash_size(uint32_t *p_size);
54int mpc55xx_flash_writable(
void);
55uint32_t mpc55xx_flash_address(
void);
56void mpc55xx_flash_set_read_only(
void);
57void mpc55xx_flash_set_read_write(
void);
59int mpc55xx_physical_address(
const void *addr, uint32_t *p_result);
60int mpc55xx_mapped_address(
const void *addr, uint32_t *p_result);
63#define MPC55XX_FLASH_BLANK_CHECK 0x01
64#define MPC55XX_FLASH_UNLOCK 0x02
65#define MPC55XX_FLASH_ERASE 0x04
66#define MPC55XX_FLASH_PROGRAM 0x08
67#define MPC55XX_FLASH_VERIFY 0x10
79#define MPC55XX_FLASH_CONFIG_ERR (-1)
80#define MPC55XX_FLASH_SIZE_ERR (-2)
81#define MPC55XX_FLASH_RANGE_ERR (-3)
82#define MPC55XX_FLASH_ERASE_ERR (-4)
83#define MPC55XX_FLASH_PROGRAM_ERR (-5)
84#define MPC55XX_FLASH_NOT_BLANK_ERR (-6)
85#define MPC55XX_FLASH_VERIFY_ERR (-7)
86#define MPC55XX_FLASH_LOCK_ERR (-8)
88#define MPC55XX_CACHE_ALIGNED_MASK ((uintptr_t) 0x1f)
90#define MPC55XX_CACHE_LINE_SIZE 32
95static inline int mpc55xx_is_cache_aligned(
const void *s,
size_t n)
97 return !(((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) || (n & MPC55XX_CACHE_ALIGNED_MASK));
100static inline uintptr_t mpc55xx_cache_aligned_start(
const void *s)
102 return ((uintptr_t) s & MPC55XX_CACHE_ALIGNED_MASK) ? (((uintptr_t) s & ~MPC55XX_CACHE_ALIGNED_MASK) + MPC55XX_CACHE_LINE_SIZE) : (uintptr_t)s;
105static inline size_t mpc55xx_non_cache_aligned_size(
const void *s)
107 return (uintptr_t) mpc55xx_cache_aligned_start( s) - (uintptr_t) s;
110static inline size_t mpc55xx_cache_aligned_size(
const void *s,
size_t n)
112 return (n - mpc55xx_non_cache_aligned_size( s)) & ~MPC55XX_CACHE_ALIGNED_MASK;
118static inline uint32_t mpc55xx_count_leading_zeros( uint32_t value)
129static inline void mpc55xx_wait_for_interrupt(
void)
131 #ifdef MPC55XX_HAS_WAIT_INSTRUCTION
138static inline void mpc55xx_mmu_apply_config(
const struct MMU_tag *
config)
#define PPC_SET_SPECIAL_PURPOSE_REGISTER(spr, val)
Sets the Special Purpose Register with number spr to the value in val.
Definition: powerpc-utility.h:576
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.
General purpose assembler macros, linker command file support and some inline functions for direct re...
Register definitions for the MPC55xx and MPC56xx microcontroller family.
Definition: regs-mmu.h:66
Definition: deflate.c:115