19#ifndef LIBBSP_POWERPC_MVME5500_BSP_H
20#define LIBBSP_POWERPC_MVME5500_BSP_H
48BSP_BoardTypes BSP_getBoardType(
void);
57BSP_VMEchipTypes BSP_getVMEchipType(
void);
66} DiscoveryChipVersion;
68DiscoveryChipVersion BSP_getDiscoveryChipVersion(
void);
70#define _256M 0x10000000
71#define _512M 0x20000000
73#define GT64x60_REG_BASE 0xf1000000
74#define GT64x60_REG_SPACE_SIZE 0x10000
76#define GT64x60_DEV1_BASE 0xf1100000
78#define GT64260_DEV1_SIZE 0x00100000
81#define _IO_BASE GT64x60_REG_BASE
83#define BSP_NVRAM_BASE_ADDR 0xf1110000
85#define BSP_RTC_INTA_REG 0x7ff0
86#define BSP_RTC_SECOND 0x7ff2
87#define BSP_RTC_MINUTE 0x7ff3
88#define BSP_RTC_HOUR 0x7ff4
89#define BSP_RTC_DATE 0x7ff5
90#define BSP_RTC_INTERRUPTS 0x7ff6
91#define BSP_RTC_WATCHDOG 0x7ff7
94#define PCI0_IO_BASE 0xf0000000
95#define PCI1_IO_BASE 0xf0800000
98#define PCI0_MEM_BASE 0x80000000
100#define PCI_MEM_BASE_ADJUSTMENT 0
103#define PCI_DRAM_OFFSET 0
106#define PCI1_MEM_BASE 0xe0000000
107#define PCI1_MEM_SIZE 0x10000000
114#define BSP_MAX_PCI_BUS_ON_PCI0 8
115#define BSP_MAX_PCI_BUS_ON_PCI1 2
116#define BSP_MAX_PCI_BUS (BSP_MAX_PCI_BUS_ON_PCI0+BSP_MAX_PCI_BUS_ON_PCI1)
122#define BSP_PCI_IRQ0 BSP_GPP_IRQ_LOWEST_OFFSET
128#define BSP_INTERRUPT_STACK_SIZE (16 * 1024)
131#define BSP_UART_IOBASE_COM1 GT64x60_DEV1_BASE + 0x20000
132#define BSP_UART_IOBASE_COM2 GT64x60_DEV1_BASE + 0x21000
134#define BSP_CONSOLE_PORT BSP_UART_COM1
135#define BSP_UART_BAUD_BASE 115200
140extern unsigned int BSP_mem_size;
144extern unsigned int BSP_bus_frequency;
148extern unsigned int BSP_processor_frequency;
152extern unsigned int BSP_time_base_divisor;
154#define BSP_Convert_decrementer( _value ) \
155 ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
157extern void bsp_reset(
void);
159extern int BSP_disconnect_clock_handler(
void);
162unsigned long _BSP_clear_hostbridge_errors(
int enableMCP,
int quiet);
167char *save_boot_params(
179uint32_t probeMemoryEnd(
void);
180void pci_interface(
void);
181void BSP_printPicIsrTbl(
void);
183 unsigned char I2cBusAddr,
186 unsigned char *pBuff,
191#define RTEMS_BSP_NETWORK_DRIVER_NAME "gt1"
192#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_GT64260eth_driver_attach
194#define RTEMS_BSP_NETWORK_DRIVER_NAME "wmG1"
195#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_i82544EI_driver_attach
198struct rtems_bsdnet_ifconfig;
202#define gccMemBar() RTEMS_COMPILER_MEMORY_BARRIER()
204static inline void lwmemBar(
void)
206 __asm__ volatile(
"lwsync":::
"memory");
209static inline void io_flush(
void)
211 __asm__ volatile(
"isync":::
"memory");
214static inline void memBar(
void)
216 __asm__ volatile(
"sync":::
"memory");
219static inline void ioBar(
void)
221 __asm__ volatile(
"eieio":::
"memory");
DEFAULT_INITIAL_EXTENSION Support.
#define RTEMS_BSP_NETWORK_DRIVER_ATTACH
Standard network driver attach and detach function.
Definition: bsp.h:77
int BSP_connect_clock_handler(void)
Clock Tick Device Driver.
Definition: p_clock.c:37
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.