18#ifndef LIBBSP_POWERPC_MVME3100_BSP_H
19#define LIBBSP_POWERPC_MVME3100_BSP_H
40#define BSP_INTERRUPT_STACK_SIZE (16 * 1024)
91#define _IO_BASE 0xe0000000
92#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
94#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
98#define PCI_MEM_WIN0 0x80000000
104#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
105#define BSP_OPEN_PIC_BIG_ENDIAN
107#define BSP_8540_CCSR_BASE (0xe1000000)
109#define BSP_UART_IOBASE_COM1 (BSP_8540_CCSR_BASE+0x4500)
110#define BSP_UART_IOBASE_COM2 (BSP_8540_CCSR_BASE+0x4600)
111#define PCI_CONFIG_ADDR (BSP_8540_CCSR_BASE+0x8000)
112#define PCI_CONFIG_DATA (BSP_8540_CCSR_BASE+0x8004)
113#define PCI_CONFIG_WR_ADDR( addr, val ) out_be32((uint32_t*)(addr), (val))
115#define BSP_CONSOLE_PORT BSP_UART_COM1
116#define BSP_UART_BAUD_BASE (-9600)
117#define BSP_UART_USE_SHARED_IRQS
119#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
125#define BSP_VPD_I2C_ADDR (0xA8>>1)
126#define BSP_USR0_I2C_ADDR (0xA4>>1)
127#define BSP_USR1_I2C_ADDR (0xA6>>1)
128#define BSP_THM_I2C_ADDR (0x90>>1)
129#define BSP_RTC_I2C_ADDR (0xD0>>1)
131#define BSP_I2C_BUS_DESCRIPTOR mpc8540_i2c_bus_descriptor
133#define BSP_I2C_BUS0_NAME "/dev/i2c0"
135#define BSP_I2C_VPD_EEPROM_NAME "vpd-eeprom"
136#define BSP_I2C_USR_EEPROM_NAME "usr-eeprom"
137#define BSP_I2C_USR1_EEPROM_NAME "usr1-eeprom"
138#define BSP_I2C_DS1621_NAME "ds1621"
139#define BSP_I2C_THM_NAME BSP_I2C_DS1621_NAME
140#define BSP_I2C_DS1621_RAW_NAME "ds1621-raw"
141#define BSP_I2C_DS1375_RAW_NAME "ds1375-raw"
142#define BSP_I2C_RTC_RAW_NAME BSP_I2C_DS1375_RAW_NAME
144#define BSP_I2C_VPD_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_VPD_EEPROM_NAME)
145#define BSP_I2C_USR_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_USR_EEPROM_NAME)
146#define BSP_I2C_USR1_EEPROM_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_USR1_EEPROM_NAME)
147#define BSP_I2C_DS1621_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_DS1621_NAME)
148#define BSP_I2C_THM_DEV_NAME BSP_I2C_DS1621_DEV_NAME
149#define BSP_I2C_DS1621_RAW_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_DS1621_RAW_NAME)
150#define BSP_I2C_DS1375_RAW_DEV_NAME (BSP_I2C_BUS0_NAME "." BSP_I2C_DS1375_RAW_NAME)
155#define BSP_EEPROM_BOOTPARMS_NAME BSP_I2C_USR1_EEPROM_DEV_NAME
156#define BSP_EEPROM_BOOTPARMS_SIZE 1024
157#define BSP_EEPROM_BOOTPARMS_OFFSET 0
158#define BSP_BOOTPARMS_WRITE_ENABLE() do { BSP_eeprom_write_enable(); } while (0)
159#define BSP_BOOTPARMS_WRITE_DISABLE() do { BSP_eeprom_write_protect();} while (0)
180int BSP_i2c_initialize(
void);
183#define BSP_MVME3100_SYS_CR ((volatile uint8_t *)0xe2000001)
184#define BSP_MVME3100_SYS_CR_RESET_MSK (7<<5)
185#define BSP_MVME3100_SYS_CR_RESET (5<<5)
186#define BSP_MVME3100_SYS_CR_EEPROM_WP (1<<1)
187#define BSP_MVME3100_SYS_CR_TSTAT_MSK (1<<0)
190#define BSP_MVME3100_SYS_IND_REG ((volatile uint8_t *)0xe2000002)
191#define BSP_LED_BRD_FAIL (1<<0)
192#define BSP_LED_USR1 (1<<1)
193#define BSP_LED_USR2 (1<<2)
194#define BSP_LED_USR3 (1<<3)
197#define BSP_MVME3100_FLASH_CSR ((volatile uint8_t *)0xe2000003)
198#define BSP_MVME3100_FLASH_CSR_FLASH_RDY (1<<0)
199#define BSP_MVME3100_FLASH_CSR_FBT_BLK_SEL (1<<1)
200#define BSP_MVME3100_FLASH_CSR_F_WP_HW (1<<2)
201#define BSP_MVME3100_FLASH_CSR_F_WP_SW (1<<3)
202#define BSP_MVME3100_FLASH_CSR_MAP_SEL (1<<4)
205#define BSP_MVME3100_IRQ_DETECT_REG ((volatile uint8_t *)0xe2000007)
216uint8_t BSP_setSysReg(
volatile uint8_t *r, uint8_t mask);
228uint8_t BSP_clrSysReg(
volatile uint8_t *r, uint8_t mask);
235uint8_t BSP_eeprom_write_protect(
void);
240uint8_t BSP_eeprom_write_enable(
void);
250uint8_t BSP_setLEDs(uint8_t mask);
258uint8_t BSP_clrLEDs(uint8_t mask);
261#define outport_byte(port,value) outb(value,port)
262#define outport_word(port,value) outw(value,port)
263#define outport_long(port,value) outl(value,port)
265#define inport_byte(port,value) (value = inb(port))
266#define inport_word(port,value) (value = inw(port))
267#define inport_long(port,value) (value = inl(port))
273extern unsigned int BSP_mem_size;
277extern unsigned int BSP_bus_frequency;
281extern unsigned int BSP_processor_frequency;
285extern unsigned int BSP_time_base_divisor;
289extern char *BSP_commandline_string;
291#define BSP_Convert_decrementer( _value ) \
292 ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
294extern int BSP_disconnect_clock_handler (
void);
307extern unsigned long _BSP_clear_hostbridge_errors(
int enableMCP,
int quiet);
308extern void BSP_motload_pci_fixup(
void);
310struct rtems_bsdnet_ifconfig;
313rtems_tsec_attach(
struct rtems_bsdnet_ifconfig *ifcfg,
int attaching);
315#define RTEMS_BSP_NETWORK_DRIVER_NAME "tse1"
316#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_tsec_attach
321char *save_boot_params(
333extern void BSP_vme_config(
void);
334extern void BSP_pciConfigDump_early(
void );
DEFAULT_INITIAL_EXTENSION Support.
int BSP_connect_clock_handler(void)
Clock Tick Device Driver.
Definition: p_clock.c:37