RTEMS 5.2
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bsp.h
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1
9/*
10 *
11 * The license and distribution terms for this file may be
12 * found in the file LICENSE in this distribution or at
13 * http://www.rtems.org/license/LICENSE.
14 */
15#ifndef LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
16#define LIBBSP_POWERPC_MOTOROLA_POWERPC_BSP_H
17
28#include <bspopts.h>
29#include <bsp/default-initial-extension.h>
30
31#include <rtems.h>
32#include <libcpu/io.h>
33#include <bsp/vectors.h>
34
35#ifdef qemu
36#include <rtems/bspcmdline.h>
37#endif
38
39#ifdef __cplusplus
40extern "C" {
41#endif
42
43/*
44 * diagram illustrating the role of the configuration
45 * constants
46 * PCI_MEM_WIN0: CPU starting addr where PCI memory space is visible
47 * PCI_MEM_BASE: CPU address of PCI mem addr. zero. (regardless of this
48 * address being 'visible' or not!).
49 * _VME_A32_WIN0_ON_PCI: PCI starting addr of the 1st window to VME
50 * _VME_A32_WIN0_ON_VME: VME address of that same window
51 *
52 * AFAIK, only PreP boards have a non-zero PCI_MEM_BASE (i.e., an offset between
53 * CPU and PCI addresses). The mvme2300 'ppcbug' firmware configures the PCI
54 * bus using PCI base addresses! I.e., drivers need to add PCI_MEM_BASE to
55 * the base address read from PCI config.space in order to translate that
56 * into a CPU address.
57 *
58 * NOTE: VME addresses should NEVER be translated using these constants!
59 * they are strictly for BSP internal use. Drivers etc. should use
60 * the translation routines int VME.h (BSP_vme2local_adrs/BSP_local2vme_adrs).
61 *
62 * CPU ADDR PCI_ADDR VME ADDR
63 *
64 * 00000000 XXXXXXXX XXXXXXXX
65 * ^ ^ ........
66 * | |
67 * | | e.g., RAM XXXXXXXX
68 * | | 00000000
69 * | | ......... ^
70 * | | (possible offset |
71 * | | between pci and XXXXXXXX | ......
72 * | | cpu addresses) |
73 * | v |
74 * | PCI_MEM_BASE -------------> 00000000 --------------- |
75 * | ........ ........ ^ |
76 * | invisible | |
77 * | ........ from CPU | |
78 * v | |
79 * PCI_MEM_WIN0 ============= first visible PCI addr | |
80 * | |
81 * pci devices pci window | |
82 * visible here v v
83 * mapped by ========== _VME_A32_WIN0_ON_PCI ======= _VME_A32_WIN0_ON_VME
84 * vme window
85 * VME devices hostbridge mapped by
86 * visible here universe
87 * =====================================================
88 *
89 */
90
91/* fundamental addresses for BSP (CHRPxxx and PREPxxx are from libcpu/io.h) */
92#if defined(mvme2100)
93#define _IO_BASE CHRP_ISA_IO_BASE
94#define _ISA_MEM_BASE CHRP_ISA_MEM_BASE
95/* address of our ram on the PCI bus */
96#define PCI_DRAM_OFFSET CHRP_PCI_DRAM_OFFSET
97/* offset of pci memory as seen from the CPU */
98#define PCI_MEM_BASE 0
99/* where (in CPU addr. space) does the PCI window start */
100#define PCI_MEM_WIN0 0x80000000
101
102#else
103#define _IO_BASE PREP_ISA_IO_BASE
104#define _ISA_MEM_BASE PREP_ISA_MEM_BASE
105#ifndef qemu
106/* address of our ram on the PCI bus */
107#define PCI_DRAM_OFFSET PREP_PCI_DRAM_OFFSET
108/* offset of pci memory as seen from the CPU */
109#define PCI_MEM_BASE PREP_ISA_MEM_BASE
110#define PCI_MEM_WIN0 0
111#else
112#define PCI_DRAM_OFFSET 0
113#define PCI_MEM_BASE 0
114#define PCI_MEM_WIN0 PREP_ISA_MEM_BASE
115#endif
116#endif
117
118/*
119 * The BSP has PCI devices. Enable support in LibBSD.
120 */
121#define BSP_HAS_PC_PCI
122
123/*
124 * Remap the PCI address space for LibBSD
125 */
126#define RTEMS_BSP_PCI_IO_REGION_BASE 0
127#define RTEMS_BSP_PCI_MEM_REGION_BASE PCI_DRAM_OFFSET
128
129/*
130 * Remap the PCI address space for LibBSD
131 */
132#define RTEMS_BSP_ADDR_PTR(_type) uint ## _type ## _t __volatile*
133#define RTEMS_BSP_ADDR_CPTR(_type) const RTEMS_BSP_ADDR_PTR(_type)
134#define RTEMS_BSP_ADDRESS_READ(_addr, _type) \
135 *((RTEMS_BSP_ADDR_CPTR(_type)) (((RTEMS_BSP_ADDR_CPTR(8)) _addr) + PCI_DRAM_OFFSET))
136#define RTEMS_BSP_ADDRESS_WRITE(_addr, _val, _type) \
137 *((RTEMS_BSP_ADDR_PTR(_type)) (((RTEMS_BSP_ADDR_PTR(8)) _addr) + PCI_DRAM_OFFSET)) = (_val)
138
139#define RTEMS_BSP_READ_1(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 8)
140#define RTEMS_BSP_READ_2(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 16)
141#define RTEMS_BSP_READ_4(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 32)
142#define RTEMS_BSP_READ_8(_addr) RTEMS_BSP_ADDRESS_READ(_addr, 64)
143
144#define RTEMS_BSP_WRITE_1(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 8)
145#define RTEMS_BSP_WRITE_2(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 16)
146#define RTEMS_BSP_WRITE_4(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 32)
147#define RTEMS_BSP_WRITE_8(_addr, _val) RTEMS_BSP_ADDRESS_WRITE(_addr, _val, 64)
148
149/*
150 * Base address definitions for several devices
151 *
152 * MVME2100 is very similar but has fewer devices and uses on-CPU EPIC
153 * implementation of OpenPIC controller. It also cannot be probed to
154 * find out what it is which is VERY different from other Motorola boards.
155 */
156
157#if defined(mvme2100)
158#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x01e10000)
159/* #define BSP_UART_IOBASE_COM1 (0xffe10000) */
160#define BSP_OPEN_PIC_BASE_OFFSET 0x40000
161
162#define MVME_HAS_DEC21140
163#else
164#define BSP_UART_IOBASE_COM1 ((_IO_BASE)+0x3f8)
165#define BSP_UART_IOBASE_COM2 ((_IO_BASE)+0x2f8)
166
167#if ! defined(qemu)
168#define BSP_KBD_IOBASE ((_IO_BASE)+0x60)
169#define BSP_VGA_IOBASE ((_IO_BASE)+0x3c0)
170#endif
171
172#if defined(mvme2300)
173#define MVME_HAS_DEC21140
174#endif
175#endif
176
177#define BSP_CONSOLE_PORT BSP_UART_COM1
178#define BSP_UART_BAUD_BASE 115200
179
180struct rtems_bsdnet_ifconfig;
181
182#if defined(MVME_HAS_DEC21140)
183#define RTEMS_BSP_NETWORK_DRIVER_NAME "dc1"
184#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_dec21140_driver_attach
185extern int rtems_dec21140_driver_attach(struct rtems_bsdnet_ifconfig *, int);
186#endif
187
188#ifdef qemu
189#define RTEMS_BSP_NETWORK_DRIVER_NAME "ne1"
190#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_ne_driver_attach
191extern int rtems_ne_driver_attach(struct rtems_bsdnet_ifconfig *, int);
192
193RTEMS_INLINE_ROUTINE const char* bsp_cmdline_arg(const char* arg)
194{
195 return rtems_bsp_cmdline_get_param_raw(arg);
196}
197#endif
198
199#ifdef qemu
200#define BSP_IDLE_TASK_BODY bsp_ppc_idle_task_body
201extern void *bsp_ppc_idle_task_body(uintptr_t arg);
202#endif
203
204#include <bsp/openpic.h>
205/* BSP_PIC_DO_EOI is optionally used by the 'vmeUniverse' driver
206 * to implement VME IRQ priorities in software.
207 * Note that this requires support by the interrupt controller
208 * driver (cf. libbsp/shared/powerpc/irq/openpic_i8259_irq.c)
209 * and the BSP-specific universe initialization/configuration
210 * (cf. libbsp/shared/powerpc/vme/VMEConfig.h vme_universe.c)
211 *
212 * ********* IMPORTANT NOTE ********
213 * When deriving from this file (new BSPs)
214 * DO NOT define "BSP_PIC_DO_EOI" if you don't know what
215 * you are doing i.e., w/o implementing the required pieces
216 * mentioned above.
217 * ********* IMPORTANT NOTE ********
218 */
219#define BSP_PIC_DO_EOI openpic_eoi(0)
220
221#ifndef ASM
222#define outport_byte(port,value) outb(value,port)
223#define outport_word(port,value) outw(value,port)
224#define outport_long(port,value) outl(value,port)
225
226#define inport_byte(port,value) (value = inb(port))
227#define inport_word(port,value) (value = inw(port))
228#define inport_long(port,value) (value = inl(port))
229
230/*
231 * Vital Board data Start using DATA RESIDUAL
232 */
233
234/*
235 * Total memory using RESIDUAL DATA
236 */
237extern unsigned int BSP_mem_size;
238/*
239 * Start of the heap
240 */
241extern unsigned int BSP_heap_start;
242/*
243 * PCI Bus Frequency
244 */
245extern unsigned int BSP_bus_frequency;
246/*
247 * processor clock frequency
248 */
249extern unsigned int BSP_processor_frequency;
250/*
251 * Time base divisior (how many tick for 1 second).
252 */
253extern unsigned int BSP_time_base_divisor;
254
255/*
256 * String passed by the bootloader.
257 */
258extern char *BSP_commandline_string;
259
260#define BSP_Convert_decrementer( _value ) \
261 ((unsigned long long) ((((unsigned long long)BSP_time_base_divisor) * 1000000ULL) /((unsigned long long) BSP_bus_frequency)) * ((unsigned long long) (_value)))
262
263/* extern int printk(const char *, ...) __attribute__((format(printf, 1, 2))); */
264extern int BSP_disconnect_clock_handler (void);
265extern int BSP_connect_clock_handler (void);
266
267/* clear hostbridge errors
268 *
269 * NOTE: The routine returns always (-1) if 'enableMCP==1'
270 * [semantics needed by libbspExt] if the MCP input is not wired.
271 * It returns and clears the error bits of the PCI status register.
272 * MCP support is disabled because:
273 * a) the 2100 has no raven chip
274 * b) the raven (2300) would raise machine check interrupts
275 * on PCI config space access to empty slots.
276 */
277extern unsigned long _BSP_clear_hostbridge_errors(int enableMCP, int quiet);
278
279/*
280 * Prototypes for methods called only from .S for dependency tracking
281 */
282char *save_boot_params(
283 void *r3,
284 void *r4,
285 void *r5,
286 char *cmdline_start,
287 char *cmdline_end
288);
289void zero_bss(void);
290
291/*
292 * Prototypes for BSP methods which cross file boundaries
293 */
294void VIA_isa_bridge_interrupts_setup(void);
295
296#endif
297
298#ifdef __cplusplus
299};
300#endif
301
304#endif
vectors.h
PowerPC Exceptions API.
bspcmdline.h
BSP Command Line Handler.
default-initial-extension.h
DEFAULT_INITIAL_EXTENSION Support.
rtems_bsp_cmdline_get_param_raw
const char * rtems_bsp_cmdline_get_param_raw(const char *name)
Obtain Pointer to the Entire Matching Argument.
Definition: bspcmdline_getparamraw.c:28
BSP_connect_clock_handler
int BSP_connect_clock_handler(void)
Clock Tick Device Driver.
Definition: p_clock.c:37
RTEMS_INLINE_ROUTINE
#define RTEMS_INLINE_ROUTINE
Definition: basedefs.h:66
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