31#ifndef LIBBSP_POWERPC_GEN5200_BSP_H
32#define LIBBSP_POWERPC_GEN5200_BSP_H
52LINKER_SYMBOL(bsp_ram_start);
53LINKER_SYMBOL(bsp_ram_end);
54LINKER_SYMBOL(bsp_ram_size);
56LINKER_SYMBOL(bsp_rom_start);
57LINKER_SYMBOL(bsp_rom_end);
58LINKER_SYMBOL(bsp_rom_size);
60LINKER_SYMBOL(bsp_dpram_start);
61LINKER_SYMBOL(bsp_dpram_end);
62LINKER_SYMBOL(bsp_dpram_size);
64LINKER_SYMBOL(bsp_section_text_start);
65LINKER_SYMBOL(bsp_section_text_end);
66LINKER_SYMBOL(bsp_section_text_size);
68LINKER_SYMBOL(bsp_section_data_start);
69LINKER_SYMBOL(bsp_section_data_end);
70LINKER_SYMBOL(bsp_section_data_size);
72LINKER_SYMBOL(bsp_section_bss_start);
73LINKER_SYMBOL(bsp_section_bss_end);
74LINKER_SYMBOL(bsp_section_bss_size);
76LINKER_SYMBOL(bsp_work_area_start);
82#ifdef MPC5200_BOARD_PM520_ZE30
86#ifdef MPC5200_BOARD_PM520_CR825
90#ifdef MPC5200_BOARD_ICECUBE
94#ifdef MPC5200_BOARD_BRS5L
104#if defined(MPC5200_BOARD_PM520_ZE30)
110#if defined(MPC5200_BOARD_PM520_CR825)
114#if !defined(HAS_UBOOT)
116 #define NEED_LOW_LEVEL_INIT
119#if defined(MPC5200_BOARD_BRS5L)
124#define HAS_NVRAM_93CXX
126#elif defined(MPC5200_BOARD_BRS6L)
127 #define MPC5200_BRS6L_FPGA_BEGIN 0x800000
128 #define MPC5200_BRS6L_FPGA_SIZE (64 * 1024)
129 #define MPC5200_BRS6L_FPGA_END \
130 (MPC5200_BRS6L_FPGA_BEGIN + MPC5200_BRS6L_FPGA_SIZE)
132 #define MPC5200_BRS6L_MRAM_BEGIN 0xff000000
133 #define MPC5200_BRS6L_MRAM_SIZE (4 * 1024 * 1024)
134 #define MPC5200_BRS6L_MRAM_END \
135 (MPC5200_BRS6L_MRAM_BEGIN + MPC5200_BRS6L_MRAM_SIZE)
140#elif defined (MPC5200_BOARD_ICECUBE)
148#elif defined (MPC5200_BOARD_DP2)
153#error "board type not defined"
159#include <bsp/i2cdrv.h>
172struct rtems_bsdnet_ifconfig;
173extern int rtems_mpc5200_fec_driver_attach_detach (
struct rtems_bsdnet_ifconfig *
config,
int attaching);
174#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth1"
175#define RTEMS_BSP_NETWORK_DRIVER_ATTACH rtems_mpc5200_fec_driver_attach_detach
192#ifdef HAS_NVRAM_93CXX
193#define NVRAM_DRIVER_TABLE_ENTRY \
194 { nvram_driver_initialize, nvram_driver_open, nvram_driver_close, \
195 nvram_driver_read, nvram_driver_write, NULL }
201#define RTEMS_BSP_HAS_IDE_DRIVER
212#if defined(HAS_UBOOT)
213#define IPB_CLOCK (bsp_uboot_board_info.bi_ipbfreq)
214#define XLB_CLOCK (bsp_uboot_board_info.bi_busfreq)
215#define G2_CLOCK (bsp_uboot_board_info.bi_intfreq)
216#elif defined(MPC5200_BOARD_BRS5L) || defined(MPC5200_BOARD_BRS6L)
217#define IPB_CLOCK 66000000
218#define XLB_CLOCK 132000000
219#define G2_CLOCK 396000000
221#define IPB_CLOCK 33000000
222#define XLB_CLOCK 66000000
223#define G2_CLOCK 231000000
226#if defined(HAS_UBOOT)
227#define GEN5200_CONSOLE_BAUD (bsp_uboot_board_info.bi_baudrate)
229#define GEN5200_CONSOLE_BAUD 115200
244#define BSP_Convert_decrementer( _value ) \
245 (int) (((_value) * 4000) / (XLB_CLOCK/10000))
248#define USE_SLICETIMER_0 TRUE
249#define USE_SLICETIMER_1 FALSE
252#define BSP_IDLE_TASK_BODY bsp_idle_thread
255void BSP_IRQ_Benchmarking_Reset(
void);
256void BSP_IRQ_Benchmarking_Report(
void);
258#if defined(HAS_UBOOT)
260 const char *bsp_uboot_getenv(
267int mpc5200_eth_mii_read(
DEFAULT_INITIAL_EXTENSION Support.
void * bsp_idle_thread(uintptr_t ignored)
Optimized idle task.
Definition: bspidle.c:26
General purpose assembler macros, linker command file support and some inline functions for direct re...
Definition: deflate.c:115