18#ifndef LIBBSP_ARM_RTL22XX_BSP_H
19#define LIBBSP_ARM_RTL22XX_BSP_H
40#define BSP_FEATURE_IRQ_EXTENSION
42#define CONFIG_ARM_CLK 60000000L
47#define LPC22xx_Fcclk CONFIG_ARM_CLK
51#define LPC22xx_Fcclk CONFIG_ARM_CLK
52#define LPC22xx_Fcco LPC22xx_Fcclk * 4
54#define LPC22xx_Fpclk (LPC22xx_Fcclk /4) *1
63#define Fcclk_MIN 10000000L
64#define Fcclk_MAX 60000000L
73#define Fcco_MIN 156000000L
74#define Fcco_MAX 320000000L
78#define PLLFEED_DATA1 0xAA
79#define PLLFEED_DATA2 0x55
86#define PLLCON_ENABLE_BIT 0
87#define PLLCON_CONNECT_BIT 1
96#define PLLSTAT_ENABLE_BIT 8
97#define PLLSTAT_CONNECT_BIT 9
98#define PLLSTAT_LOCK_BIT 10
131#define Fcclk (Fosc << 2)
133#define Fcco (Fcclk <<2)
135#define Fpclk (Fcclk >>2) * 1
143#define JOEL_M Fcclk / Fosc
144#define P_min Fcco_MIN / (2*Fcclk) + 1;
145#define P_max Fcco_MAX / (2*Fcclk);
147#define UART_BPS 115200
150#define TIMER_PRECISION 10
153#define I2CSPEED 20000
166#define SPISPEED 1500000
171#define SPI_CS_PIN P0_13
172#define SPI_CS_PIN_FUNC PINSEL0_bit.SPI_CS_PIN
181#define RTL22XX_FLASH_SIZE (0x80000-RTL22XX_FLASH_BOOT)
183#define RTL22XX_FLASH_BEGIN 0x80000000
185#define RTL22XX_FLASH_BASE (RTL22XX_FLASH_BEGIN+RTL22XX_FLASH_BOOT)
195#define SRAM_SIZE 0x100000
197#define SRAM_BASE 0x81000000
202#define CS8900A_BASE 0x82000000
204#define RTL8019AS_BASE 0x82000000
206struct rtems_bsdnet_ifconfig;
207int cs8900_driver_attach (
struct rtems_bsdnet_ifconfig *
config,
215#define RTEMS_BSP_NETWORK_DRIVER_NAME "eth0"
216#define RTEMS_BSP_NETWORK_DRIVER_ATTACH cs8900_driver_attach
223extern void UART0_Ini(
void);
DEFAULT_INITIAL_EXTENSION Support.
Definition: deflate.c:115