23#ifndef LIBBSP_ARM_BEAGLE_I2C_H
24#define LIBBSP_ARM_BEAGLE_I2C_H
34#define BBB_I2C_SYSCLK 48000000
35#define BBB_I2C_INTERNAL_CLK 12000000
37#define BBB_I2C_0_BUS_PATH "/dev/i2c-0"
38#define BBB_I2C_1_BUS_PATH "/dev/i2c-1"
39#define BBB_I2C_2_BUS_PATH "/dev/i2c-2"
41#define BBB_I2C0_IRQ 70
42#define BBB_I2C1_IRQ 71
43#define BBB_I2C2_IRQ 30
53 uint32_t BBB_I2C_REVNB_LO;
54 uint32_t BBB_I2C_REVNB_HI;
56 uint32_t BBB_I2C_SYSC;
58 uint32_t BBB_I2C_IRQSTATUS_RAW;
59 uint32_t BBB_I2C_IRQSTATUS;
60 uint32_t BBB_I2C_IRQENABLE_SET;
61 uint32_t BBB_I2C_IRQENABLE_CLR;
63 uint32_t BBB_I2C_DMARXENABLE_SET;
64 uint32_t BBB_I2C_DMATXENABLE_SET;
65 uint32_t BBB_I2C_DMARXENABLE_CLR;
66 uint32_t BBB_I2C_DMATXENABLE_CLR;
67 uint32_t BBB_I2C_DMARXWAKE_EN;
68 uint32_t BBB_I2C_DMATXWAKE_EN;
69 uint32_t dummy3[ 16 ];
70 uint32_t BBB_I2C_SYSS;
73 uint32_t BBB_I2C_DATA;
79 uint32_t BBB_I2C_SCLL;
80 uint32_t BBB_I2C_SCLH;
81 uint32_t BBB_I2C_SYSTEST;
82 uint32_t BBB_I2C_BUFSTAT;
86 uint32_t BBB_I2C_ACTOA;
87 uint32_t BBB_I2C_SBLOCK;
90int am335x_i2c_bus_register(
92 uintptr_t register_base,
97static inline int bbb_register_i2c_1(
void )
99 return am335x_i2c_bus_register(
107static inline int bbb_register_i2c_2(
void )
109 return am335x_i2c_bus_register(
Inter-Integrated Circuit (I2C) Driver API.
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
#define I2C_BUS_CLOCK_DEFAULT
Default I2C bus clock in Hz.
Definition: i2c.h:105