39#if defined __SAMV71J19__ \
40 || defined __SAMV71J20__ \
41 || defined __SAMV71J21__ \
42 || defined __SAMV71N19__ \
43 || defined __SAMV71N20__ \
44 || defined __SAMV71N21__ \
45 || defined __SAMV71Q19__ \
46 || defined __SAMV71Q20__ \
47 || defined __SAMV71Q21__
48 #include "include/samv71/samv71.h"
49#elif defined __SAMS70J19__ \
50 || defined __SAMS70J20__ \
51 || defined __SAMS70J21__ \
52 || defined __SAMS70N19__ \
53 || defined __SAMS70N20__ \
54 || defined __SAMS70N21__ \
55 || defined __SAMS70Q19__ \
56 || defined __SAMS70Q20__ \
57 || defined __SAMS70Q21__
58 #include "include/sams70/sams70.h"
59#elif defined __SAME70J19__ \
60 || defined __SAME70J20__ \
61 || defined __SAME70J21__ \
62 || defined __SAME70N19__ \
63 || defined __SAME70N20__ \
64 || defined __SAME70N21__ \
65 || defined __SAME70Q19__ \
66 || defined __SAME70Q20__ \
67 || defined __SAME70Q21__
68 #include "include/same70/same70.h"
70 #error "please define correct macro for the chip first!"
85 #define WEAK __attribute__ ((weak))
86#elif defined (__ICCARM__)
88#elif defined (__GNUC__)
89 #define WEAK __attribute__ ((weak))
94 #define COMPILER_NAME "KEIL"
95#elif defined (__ICCARM__)
96 #define COMPILER_NAME "IAR"
97#elif defined (__GNUC__)
98 #define COMPILER_NAME "GCC"
102#if defined (__CC_ARM)
104#elif defined (__ICCARM__)
105 #define NO_INIT __no_init
106#elif defined (__GNUC__)
112#if defined (__CC_ARM)
113 #define memory_sync() __dsb(15);__isb(15);
114#elif defined (__ICCARM__)
115 #define memory_sync() __DSB();__ISB();
116#elif defined (__GNUC__)
117 #define memory_sync() __DSB();__ISB();
121#if defined (__CC_ARM)
122 #define memory_barrier() __dmb(15);
123#elif defined (__ICCARM__)
124 #define memory_barrier() __DMB();
125#elif defined (__GNUC__)
126 #define memory_barrier() __DMB();
140#define TPASTE2(a, b) a##b
141#define TPASTE3(a, b, c) a##b##c
154#define ATPASTE2(a, b) TPASTE2(a, b)
155#define ATPASTE3(a, b, c) TPASTE3(a, b, c)
165#define COMPILER_PRAGMA(arg) _Pragma(#arg)
172#define COMPILER_PACK_SET(alignment) COMPILER_PRAGMA(pack(alignment))
179#define COMPILER_PACK_RESET() COMPILER_PRAGMA(pack())
185#if defined (__CC_ARM)
186 #define COMPILER_SECTION(a) __attribute__((__section__(a)))
187#elif defined (__ICCARM__)
188 #define COMPILER_SECTION(a) COMPILER_PRAGMA(location = a)
189#elif defined (__GNUC__)
190 #define COMPILER_SECTION(a) __attribute__((__section__(a)))
196#if defined (__CC_ARM)
197 #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
198#elif defined (__ICCARM__)
199 #define COMPILER_ALIGNED(a) COMPILER_PRAGMA(data_alignment = a)
200#elif defined (__GNUC__)
201 #define COMPILER_ALIGNED(a) __attribute__((__aligned__(a)))
208#if defined (__CC_ARM)
209 #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
210#elif defined (__ICCARM__)
211 #define COMPILER_WORD_ALIGNED COMPILER_PRAGMA(data_alignment = 4)
212#elif defined (__GNUC__)
213 #define COMPILER_WORD_ALIGNED __attribute__((__aligned__(4)))
239#define Abs(a) (((a) < 0) ? -(a) : (a))
250#define Min(a, b) (((a) < (b)) ? (a) : (b))
261#define Max(a, b) (((a) > (b)) ? (a) : (b))
274#define min(a, b) Min(a, b)
285#define max(a, b) Max(a, b)
289#define be32_to_cpu(x) __REV(x)
290#define cpu_to_be32(x) __REV(x)
291#define BE32_TO_CPU(x) __REV(x)
292#define CPU_TO_BE32(x) __REV(x)
298#define UNUSED(v) (void)(v)
321# define irq_initialize_vectors() \
342# define irq_register_handler(int_num, int_prio) \
343 NVIC_ClearPendingIRQ((IRQn_Type)int_num); \
344 NVIC_SetPriority((IRQn_Type)int_num, int_prio); \
345 NVIC_EnableIRQ((IRQn_Type)int_num); \
350# define cpu_irq_enable() \
356# define cpu_irq_disable() \
363 typedef uint32_t irqflags_t;
365#if !defined(__DOXYGEN__)
366 extern volatile bool g_interrupt_enabled;
369#define cpu_irq_is_enabled() (__get_PRIMASK() == 0)
371 static volatile uint32_t cpu_irq_critical_section_counter;
372 static volatile bool cpu_irq_prev_interrupt_state;
374 static inline irqflags_t cpu_irq_save(
void)
376 irqflags_t flags = cpu_irq_is_enabled();
381 static inline bool cpu_irq_is_enabled_flags(irqflags_t flags)
386 static inline void cpu_irq_restore(irqflags_t flags)
388 if (cpu_irq_is_enabled_flags(flags))
400#define Enable_global_interrupt() cpu_irq_enable()
401#define Disable_global_interrupt() cpu_irq_disable()
402#define Is_global_interrupt_enabled() cpu_irq_is_enabled()
419 #if !defined(__bool_true_false_are_defined)
440#define ctz(u) ((u) & (1ul << 0) ? 0 : \
441 (u) & (1ul << 1) ? 1 : \
442 (u) & (1ul << 2) ? 2 : \
443 (u) & (1ul << 3) ? 3 : \
444 (u) & (1ul << 4) ? 4 : \
445 (u) & (1ul << 5) ? 5 : \
446 (u) & (1ul << 6) ? 6 : \
447 (u) & (1ul << 7) ? 7 : \
448 (u) & (1ul << 8) ? 8 : \
449 (u) & (1ul << 9) ? 9 : \
450 (u) & (1ul << 10) ? 10 : \
451 (u) & (1ul << 11) ? 11 : \
452 (u) & (1ul << 12) ? 12 : \
453 (u) & (1ul << 13) ? 13 : \
454 (u) & (1ul << 14) ? 14 : \
455 (u) & (1ul << 15) ? 15 : \
456 (u) & (1ul << 16) ? 16 : \
457 (u) & (1ul << 17) ? 17 : \
458 (u) & (1ul << 18) ? 18 : \
459 (u) & (1ul << 19) ? 19 : \
460 (u) & (1ul << 20) ? 20 : \
461 (u) & (1ul << 21) ? 21 : \
462 (u) & (1ul << 22) ? 22 : \
463 (u) & (1ul << 23) ? 23 : \
464 (u) & (1ul << 24) ? 24 : \
465 (u) & (1ul << 25) ? 25 : \
466 (u) & (1ul << 26) ? 26 : \
467 (u) & (1ul << 27) ? 27 : \
468 (u) & (1ul << 28) ? 28 : \
469 (u) & (1ul << 29) ? 29 : \
470 (u) & (1ul << 30) ? 30 : \
471 (u) & (1ul << 31) ? 31 : \