23#ifndef LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
24#define LIBBSP_ARM_SHARED_ARM_GIC_IRQ_H
34#define ARM_GIC_IRQ_SGI_0 0
35#define ARM_GIC_IRQ_SGI_1 1
36#define ARM_GIC_IRQ_SGI_2 2
37#define ARM_GIC_IRQ_SGI_3 3
38#define ARM_GIC_IRQ_SGI_5 5
39#define ARM_GIC_IRQ_SGI_6 6
40#define ARM_GIC_IRQ_SGI_7 7
41#define ARM_GIC_IRQ_SGI_8 8
42#define ARM_GIC_IRQ_SGI_9 9
43#define ARM_GIC_IRQ_SGI_10 10
44#define ARM_GIC_IRQ_SGI_11 11
45#define ARM_GIC_IRQ_SGI_12 12
46#define ARM_GIC_IRQ_SGI_13 13
47#define ARM_GIC_IRQ_SGI_14 14
48#define ARM_GIC_IRQ_SGI_15 15
50#define ARM_GIC_DIST ((volatile gic_dist *) BSP_ARM_GIC_DIST_BASE)
72void bsp_interrupt_set_affinity(
74 const Processor_mask *affinity
77void bsp_interrupt_get_affinity(
79 Processor_mask *affinity
83 ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_IN_LIST,
84 ARM_GIC_IRQ_SOFTWARE_IRQ_TO_ALL_EXCEPT_SELF,
85 ARM_GIC_IRQ_SOFTWARE_IRQ_TO_SELF
86} arm_gic_irq_software_irq_target_filter;
88void arm_gic_trigger_sgi(
90 arm_gic_irq_software_irq_target_filter filter,
96 arm_gic_irq_software_irq_target_filter filter,
102 if (vector <= ARM_GIC_IRQ_SGI_15) {
103 arm_gic_trigger_sgi(vector, filter, targets);
111static inline uint32_t arm_gic_irq_processor_count(
void)
113 volatile gic_dist *dist = ARM_GIC_DIST;
115 return GIC_DIST_ICDICTR_CPU_NUMBER_GET(dist->icdictr) + 1;
118void arm_gic_irq_initialize_secondary_cpu(
void);
ISR_Vector_number rtems_vector_number
Control block type used to manage the vectors.
Definition: intr.h:47
rtems_status_code
Classic API Status.
Definition: status.h:43
@ RTEMS_SUCCESSFUL
Definition: status.h:47
@ RTEMS_INVALID_ID
Definition: status.h:63
Definition: arm-gic-regs.h:88