RTEMS CPU Kit with SuperCore  4.11.3
lm32.h
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1 
11 /*
12  * COPYRIGHT (c) 1989-1999.
13  * On-Line Applications Research Corporation (OAR).
14  *
15  * The license and distribution terms for this file may be
16  * found in the file LICENSE in this distribution or at
17  * http://www.rtems.org/license/LICENSE.
18  *
19  * Jukka Pietarinen <jukka.pietarinen@mrf.fi>, 2008,
20  * Micro-Research Finland Oy
21  */
22 
23 #ifndef _RTEMS_SCORE_LM32_H
24 #define _RTEMS_SCORE_LM32_H
25 
26 #ifdef __cplusplus
27 extern "C" {
28 #endif
29 
30 /*
31  * This file contains the information required to build
32  * RTEMS for a particular member of the NO CPU family.
33  * It does this by setting variables to indicate which
34  * implementation dependent features are present in a particular
35  * member of the family.
36  *
37  * This is a good place to list all the known CPU models
38  * that this port supports and which RTEMS CPU model they correspond
39  * to.
40  */
41 
42 #if defined(rtems_multilib)
43 /*
44  * Figure out all CPU Model Feature Flags based upon compiler
45  * predefines.
46  */
47 
48 #define CPU_MODEL_NAME "rtems_multilib"
49 #define LM32_HAS_FPU 0
50 
51 #elif defined(__lm32__)
52 
53 #define CPU_MODEL_NAME "lm32"
54 #define LM32_HAS_FPU 0
55 
56 #else
57 
58 #error "Unsupported CPU Model"
59 
60 #endif
61 
62 /*
63  * Define the name of the CPU family.
64  */
65 
66 #define CPU_NAME "LM32"
67 
68 #ifdef __cplusplus
69 }
70 #endif
71 
72 #define lm32_read_interrupts( _ip) \
73  __asm__ volatile ("rcsr %0, ip":"=r"(_ip));
74 
75 #define lm32_disable_interrupts( _level ) \
76  do { register uint32_t ie; \
77  __asm__ volatile ("rcsr %0,ie":"=r"(ie)); \
78  (_level) = ie; \
79  ie &= (~0x0001); \
80  __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \
81  } while (0)
82 
83 #define lm32_enable_interrupts( _level ) \
84  __asm__ volatile ("wcsr ie,%0"::"r"(_level));
85 
86 #define lm32_flash_interrupts( _level ) \
87  do { register uint32_t ie; \
88  __asm__ volatile ("wcsr ie,%0"::"r"(_level)); \
89  ie = (_level) & (~0x0001); \
90  __asm__ volatile ("wcsr ie,%0"::"r"(ie)); \
91  } while (0)
92 
93 #define lm32_interrupt_unmask( _mask ) \
94  do { register uint32_t im; \
95  __asm__ volatile ("rcsr %0,im":"=r"(im)); \
96  im |= _mask; \
97  __asm__ volatile ("wcsr im,%0"::"r"(im)); \
98  } while (0)
99 
100 #define lm32_interrupt_mask( _mask ) \
101  do { register uint32_t im; \
102  __asm__ volatile ("rcsr %0,im":"=r"(im)); \
103  im &= ~(_mask); \
104  __asm__ volatile ("wcsr im,%0"::"r"(im)); \
105  } while (0)
106 
107 #define lm32_interrupt_ack( _mask ) \
108  do { register uint32_t ip = _mask; \
109  __asm__ volatile ("wcsr ip,%0"::"r"(ip)); \
110  } while (0)
111 
112 #endif /* _RTEMS_SCORE_LM32_H */
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