RTEMS CPU Kit with SuperCore  4.11.3
iom88.h
Go to the documentation of this file.
1 
7 /* Copyright (c) 2004, Theodore A. Roth
8  All rights reserved.
9 
10  Redistribution and use in source and binary forms, with or without
11  modification, are permitted provided that the following conditions are met:
12 
13  * Redistributions of source code must retain the above copyright
14  notice, this list of conditions and the following disclaimer.
15 
16  * Redistributions in binary form must reproduce the above copyright
17  notice, this list of conditions and the following disclaimer in
18  the documentation and/or other materials provided with the
19  distribution.
20 
21  * Neither the name of the copyright holders nor the names of
22  contributors may be used to endorse or promote products derived
23  from this software without specific prior written permission.
24 
25  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
26  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
29  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  POSSIBILITY OF SUCH DAMAGE. */
36 
37 
38 #ifndef _AVR_IOM88_H_
39 #define _AVR_IOM88_H_ 1
40 
49 #include <avr/iomx8.h>
50 
51 /* Constants */
52 #define SPM_PAGESIZE 64
53 #define RAMEND 0x4FF
54 #define XRAMEND RAMEND
55 #define E2END 0x1FF
56 #define E2PAGESIZE 4
57 #define FLASHEND 0x1FFF
58 
59 
60 /* Fuses */
61 #define FUSE_MEMORY_SIZE 3
62 
63 /* Low Fuse Byte */
64 #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
65 #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
66 #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
67 #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
68 #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
69 #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
70 #define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */
71 #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
72 #define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8)
73 
74 /* High Fuse Byte */
75 #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */
76 #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */
77 #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */
78 #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
79 #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */
80 #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
81 #define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */
82 #define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */
83 #define HFUSE_DEFAULT (FUSE_SPIEN)
84 
85 /* Extended Fuse Byte */
86 #define FUSE_BOOTRST (unsigned char)~_BV(0)
87 #define FUSE_BOOTSZ0 (unsigned char)~_BV(1)
88 #define FUSE_BOOTSZ1 (unsigned char)~_BV(2)
89 #define EFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1)
90 
91 
92 /* Lock Bits */
93 #define __LOCK_BITS_EXIST
94 #define __BOOT_LOCK_BITS_0_EXIST
95 #define __BOOT_LOCK_BITS_1_EXIST
96 
97 
98 /* Signature */
99 #define SIGNATURE_0 0x1E
100 #define SIGNATURE_1 0x93
101 #define SIGNATURE_2 0x0A
102 
105 #endif /* _AVR_IOM88_H_ */
Generated by   doxygen 1.8.13