RTEMS CPU Kit with SuperCore  4.11.3
iom48.h
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1 
7 /*
8  * Copyright (c) 2004, Theodore A. Roth
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions are met:
13  *
14  * * Redistributions of source code must retain the above copyright
15  * notice, this list of conditions and the following disclaimer.
16  *
17  * * Redistributions in binary form must reproduce the above copyright
18  * notice, this list of conditions and the following disclaimer in
19  * the documentation and/or other materials provided with the
20  * distribution.
21  *
22  * * Neither the name of the copyright holders nor the names of
23  * contributors may be used to endorse or promote products derived
24  * from this software without specific prior written permission.
25  *
26  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
27  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
28  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
29  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
30  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36  * POSSIBILITY OF SUCH DAMAGE.
37  */
38 
39 #ifndef _AVR_IOM48_H_
40 #define _AVR_IOM48_H_ 1
41 
49 #include <avr/iomx8.h>
50 
51 /* Constants */
52 #define SPM_PAGESIZE 64
53 #define RAMEND 0x2FF
54 #define XRAMEND RAMEND
55 #define E2END 0xFF
56 #define E2PAGESIZE 4
57 #define FLASHEND 0xFFF
58 
59 
60 /* Fuses */
61 #define FUSE_MEMORY_SIZE 3
62 
63 /* Low Fuse Byte */
64 #define FUSE_CKSEL0 (unsigned char)~_BV(0) /* Select Clock Source */
65 #define FUSE_CKSEL1 (unsigned char)~_BV(1) /* Select Clock Source */
66 #define FUSE_CKSEL2 (unsigned char)~_BV(2) /* Select Clock Source */
67 #define FUSE_CKSEL3 (unsigned char)~_BV(3) /* Select Clock Source */
68 #define FUSE_SUT0 (unsigned char)~_BV(4) /* Select start-up time */
69 #define FUSE_SUT1 (unsigned char)~_BV(5) /* Select start-up time */
70 #define FUSE_CKOUT (unsigned char)~_BV(6) /* Clock output */
71 #define FUSE_CKDIV8 (unsigned char)~_BV(7) /* Divide clock by 8 */
72 #define LFUSE_DEFAULT (FUSE_CKDIV8 & FUSE_SUT0 & FUSE_CKSEL3 & FUSE_CKSEL2 & FUSE_CKSEL0)
73 
74 /* High Fuse Byte */
75 #define FUSE_BODLEVEL0 (unsigned char)~_BV(0) /* Brown-out Detector trigger level */
76 #define FUSE_BODLEVEL1 (unsigned char)~_BV(1) /* Brown-out Detector trigger level */
77 #define FUSE_BODLEVEL2 (unsigned char)~_BV(2) /* Brown-out Detector trigger level */
78 #define FUSE_EESAVE (unsigned char)~_BV(3) /* EEPROM memory is preserved through chip erase */
79 #define FUSE_WDTON (unsigned char)~_BV(4) /* Watchdog Timer Always On */
80 #define FUSE_SPIEN (unsigned char)~_BV(5) /* Enable Serial programming and Data Downloading */
81 #define FUSE_DWEN (unsigned char)~_BV(6) /* debugWIRE Enable */
82 #define FUSE_RSTDISBL (unsigned char)~_BV(7) /* External reset disable */
83 #define HFUSE_DEFAULT (FUSE_SPIEN)
84 
85 /* Extended Fuse Byte */
86 #define FUSE_SELFPRGEN (unsigned char)~_BV(0) /* Self Programming Enable */
87 #define EFUSE_DEFAULT (0xFF)
88 
89 
90 /* Lock Bits */
91 #define __LOCK_BITS_EXIST
92 
93 
94 /* Signature */
95 #define SIGNATURE_0 0x1E
96 #define SIGNATURE_1 0x92
97 #define SIGNATURE_2 0x05
98 
100 #endif /* _AVR_IOM48_H_ */
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