RTEMS CPU Kit with SuperCore  4.11.3
iocan128.h
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1 /* Copyright (c) 2004,2005, Colin O'Flynn <coflynn@newae.com>
2  All rights reserved.
3 
4  Redistribution and use in source and binary forms, with or without
5  modification, are permitted provided that the following conditions are met:
6 
7  * Redistributions of source code must retain the above copyright
8  notice, this list of conditions and the following disclaimer.
9 
10  * Redistributions in binary form must reproduce the above copyright
11  notice, this list of conditions and the following disclaimer in
12  the documentation and/or other materials provided with the
13  distribution.
14 
15  * Neither the name of the copyright holders nor the names of
16  contributors may be used to endorse or promote products derived
17  from this software without specific prior written permission.
18 
19  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  POSSIBILITY OF SUCH DAMAGE. */
30 
31 
32 /* iocan128.h - definitions for CAN128 */
33 
34 #ifndef _AVR_IOCAN128_H_
35 #define _AVR_IOCAN128_H_ 1
36 
37 #include <avr/iocanxx.h>
38 
39 /* Constants */
40 #define SPM_PAGESIZE 256
41 #define RAMEND 0x10FF /* Last On-Chip SRAM Location */
42 #define XRAMEND 0xFFFF
43 #define E2END 0x0FFF
44 #define E2PAGESIZE 8
45 #define FLASHEND 0x1FFFF
46 
47 
48 /* Fuses */
49 
50 #define FUSE_MEMORY_SIZE 3
51 
52 /* Low Fuse Byte */
53 #define FUSE_CKSEL0 (unsigned char)~_BV(0)
54 #define FUSE_CKSEL1 (unsigned char)~_BV(1)
55 #define FUSE_CKSEL2 (unsigned char)~_BV(2)
56 #define FUSE_CKSEL3 (unsigned char)~_BV(3)
57 #define FUSE_SUT0 (unsigned char)~_BV(4)
58 #define FUSE_SUT1 (unsigned char)~_BV(5)
59 #define FUSE_CKOUT (unsigned char)~_BV(6)
60 #define FUSE_CKDIV8 (unsigned char)~_BV(7)
61 #define LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8)
62 
63 /* High Fuse Byte */
64 #define FUSE_BOOTRST (unsigned char)~_BV(0)
65 #define FUSE_BOOTSZ0 (unsigned char)~_BV(1)
66 #define FUSE_BOOTSZ1 (unsigned char)~_BV(2)
67 #define FUSE_EESAVE (unsigned char)~_BV(3)
68 #define FUSE_WDTON (unsigned char)~_BV(4)
69 #define FUSE_SPIEN (unsigned char)~_BV(5)
70 #define FUSE_JTAGEN (unsigned char)~_BV(6)
71 #define FUSE_OCDEN (unsigned char)~_BV(7)
72 #define HFUSE_DEFAULT (FUSE_BOOTSZ0 & FUSE_BOOTSZ1 & FUSE_SPIEN & FUSE_JTAGEN)
73 
74 /* Extended Fuse Byte */
75 #define FUSE_BODLEVEL0 (unsigned char)~_BV(1)
76 #define FUSE_BODLEVEL1 (unsigned char)~_BV(2)
77 #define FUSE_BODLEVEL2 (unsigned char)~_BV(3)
78 #define EFUSE_DEFAULT (0xFF)
79 
80 
81 /* Lock Bits */
82 #define __LOCK_BITS_EXIST
83 #define __BOOT_LOCK_BITS_0_EXIST
84 #define __BOOT_LOCK_BITS_1_EXIST
85 
86 
87 /* Signature */
88 #define SIGNATURE_0 0x1E
89 #define SIGNATURE_1 0x97
90 #define SIGNATURE_2 0x81
91 
92 
93 #endif /* _AVR_IOCAN128_H_ */
iocanxx.h
Definitions for AT90CAN32, AT90CAN64 and AT90CAN128.
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