RTEMS CPU Kit with SuperCore  4.11.3
in_cksum_sparc.h
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1 /* $NetBSD: in_cksum.c,v 1.12.10.4 2005/12/11 10:28:36 christos Exp $ */
2 
3 /*
4  * Copyright (c) 1995 Matthew R. Green.
5  * Copyright (c) 1992, 1993
6  * The Regents of the University of California. All rights reserved.
7  *
8  * All advertising materials mentioning features or use of this software
9  * must display the following acknowledgement:
10  * This product includes software developed by the University of
11  * California, and it's contributors.
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  * notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  * notice, this list of conditions and the following disclaimer in the
20  * documentation and/or other materials provided with the distribution.
21  * 3. Neither the name of the University nor the names of its contributors
22  * may be used to endorse or promote products derived from this software
23  * without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
27  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
28  * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
29  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
30  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
31  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35  * SUCH DAMAGE.
36  *
37  * @(#)in_cksum.c 8.1 (Berkeley) 6/11/93
38  */
39 
40 /*
41  * Copyright (c) 1995 Zubin Dittia.
42  * Copyright (c) 1994, 1998 Charles M. Hannum.
43  *
44  * All advertising materials mentioning features or use of this software
45  * must display the following acknowledgement:
46  * This product includes software developed by the University of
47  * California, and it's contributors.
48  *
49  * Redistribution and use in source and binary forms, with or without
50  * modification, are permitted provided that the following conditions
51  * are met:
52  * 1. Redistributions of source code must retain the above copyright
53  * notice, this list of conditions and the following disclaimer.
54  * 2. Redistributions in binary form must reproduce the above copyright
55  * notice, this list of conditions and the following disclaimer in the
56  * documentation and/or other materials provided with the distribution.
57  * 3. All advertising materials mentioning features or use of this software
58  * must display the following acknowledgement:
59  * This product includes software developed by the University of
60  * California, Berkeley and its contributors.
61  * 4. Neither the name of the University nor the names of its contributors
62  * may be used to endorse or promote products derived from this software
63  * without specific prior written permission.
64  *
65  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
66  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
67  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
68  * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
69  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
70  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
71  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
72  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
73  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
74  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
75  * SUCH DAMAGE.
76  *
77  * @(#)in_cksum.c 8.1 (Berkeley) 6/11/93
78  */
79 
80 #include <sys/cdefs.h>
81 #include <sys/param.h>
82 #include <sys/systm.h>
83 #include <sys/mbuf.h>
84 #include <netinet/in.h>
85 #include <netinet/in_systm.h>
86 #include <netinet/ip.h>
87 #include <netinet/ip_var.h>
88 
89 /*
90  * Checksum routine for Internet Protocol family headers.
91  *
92  * This routine is very heavily used in the network
93  * code and should be modified for each CPU to be as fast as possible.
94  *
95  * SPARC version.
96  */
97 
98 /*
99  * The checksum computation code here is significantly faster than its
100  * vanilla C counterpart (by significantly, I mean 2-3 times faster if
101  * the data is in cache, and 1.5-2 times faster if the data is not in
102  * cache).
103  * We optimize on three fronts:
104  * 1. By using the add-with-carry (addxcc) instruction, we can use
105  * 32-bit operations instead of 16-bit operations.
106  * 2. By unrolling the main loop to reduce branch overheads.
107  * 3. By doing a sequence of load,load,add,add,load,load,add,add,
108  * we can avoid the extra stall cycle which is incurred if the
109  * instruction immediately following a load tries to use the
110  * target register of the load.
111  * Another possible optimization is to replace a pair of 32-bit loads
112  * with a single 64-bit load (ldd) instruction, but I found that although
113  * this improves performance somewhat on Sun4c machines, it actually
114  * reduces performance considerably on Sun4m machines (I don't know why).
115  * So I chose to leave it out.
116  *
117  * Zubin Dittia (zubin@dworkin.wustl.edu)
118  */
119 
120 #define Asm __asm __volatile
121 #define ADD64 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
122  addcc %0,%1,%0; addxcc %0,%2,%0; \
123  ld [%4+ 8],%1; ld [%4+12],%2; \
124  addxcc %0,%1,%0; addxcc %0,%2,%0; \
125  ld [%4+16],%1; ld [%4+20],%2; \
126  addxcc %0,%1,%0; addxcc %0,%2,%0; \
127  ld [%4+24],%1; ld [%4+28],%2; \
128  addxcc %0,%1,%0; addxcc %0,%2,%0; \
129  ld [%4+32],%1; ld [%4+36],%2; \
130  addxcc %0,%1,%0; addxcc %0,%2,%0; \
131  ld [%4+40],%1; ld [%4+44],%2; \
132  addxcc %0,%1,%0; addxcc %0,%2,%0; \
133  ld [%4+48],%1; ld [%4+52],%2; \
134  addxcc %0,%1,%0; addxcc %0,%2,%0; \
135  ld [%4+56],%1; ld [%4+60],%2; \
136  addxcc %0,%1,%0; addxcc %0,%2,%0; \
137  addxcc %0,0,%0" \
138  : "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
139  : "0" (sum), "r" (w))
140 #define ADD32 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
141  addcc %0,%1,%0; addxcc %0,%2,%0; \
142  ld [%4+ 8],%1; ld [%4+12],%2; \
143  addxcc %0,%1,%0; addxcc %0,%2,%0; \
144  ld [%4+16],%1; ld [%4+20],%2; \
145  addxcc %0,%1,%0; addxcc %0,%2,%0; \
146  ld [%4+24],%1; ld [%4+28],%2; \
147  addxcc %0,%1,%0; addxcc %0,%2,%0; \
148  addxcc %0,0,%0" \
149  : "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
150  : "0" (sum), "r" (w))
151 #define ADD16 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
152  addcc %0,%1,%0; addxcc %0,%2,%0; \
153  ld [%4+ 8],%1; ld [%4+12],%2; \
154  addxcc %0,%1,%0; addxcc %0,%2,%0; \
155  addxcc %0,0,%0" \
156  : "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
157  : "0" (sum), "r" (w))
158 #define ADD8 Asm(" ld [%4+ 0],%1; ld [%4+ 4],%2; \
159  addcc %0,%1,%0; addxcc %0,%2,%0; \
160  addxcc %0,0,%0" \
161  : "=r" (sum), "=&r" (tmp1), "=&r" (tmp2)\
162  : "0" (sum), "r" (w))
163 #define ADD4 Asm(" ld [%3+ 0],%1; \
164  addcc %0,%1,%0; \
165  addxcc %0,0,%0" \
166  : "=r" (sum), "=&r" (tmp1) \
167  : "0" (sum), "r" (w))
168 
169 #define REDUCE {sum = (sum & 0xffff) + (sum >> 16);}
170 #define ADDCARRY {if (sum > 0xffff) sum -= 0xffff;}
171 #define ROL {sum = sum << 8;} /* depends on recent REDUCE */
172 #define ADDBYTE {ROL; sum += *w; byte_swapped ^= 1;}
173 #define ADDSHORT {sum += *(u_short *)w;}
174 #define ADVANCE(n) {w += n; mlen -= n;}
175 
176 static __inline__ int
177 in_cksum_internal(struct mbuf *m, int off, int len, u_int sum)
178 {
179  u_char *w;
180  int mlen = 0;
181  int byte_swapped = 0;
182 
183  /*
184  * Declare two temporary registers for use by the asm code. We
185  * allow the compiler to pick which specific machine registers to
186  * use, instead of hard-coding this in the asm code above.
187  */
188  u_int tmp1, tmp2;
189 
190  for (; m && len; m = m->m_next) {
191  if (m->m_len == 0)
192  continue;
193  w = mtod(m, u_char *) + off;
194  mlen = m->m_len - off;
195  off = 0;
196  if (len < mlen)
197  mlen = len;
198  len -= mlen;
199 
200  /*
201  * Ensure that we're aligned on a word boundary here so
202  * that we can do 32 bit operations below.
203  */
204  if ((3 & (long)w) != 0) {
205  REDUCE;
206  if ((1 & (long)w) != 0 && mlen >= 1) {
207  ADDBYTE;
208  ADVANCE(1);
209  }
210  if ((2 & (long)w) != 0 && mlen >= 2) {
211  ADDSHORT;
212  ADVANCE(2);
213  }
214  }
215 
216  /*
217  * Do as many 32 bit operations as possible using the
218  * 64/32/16/8/4 macro's above, using as many as possible of
219  * these.
220  */
221  while (mlen >= 64) {
222  ADD64;
223  ADVANCE(64);
224  }
225  if (mlen >= 32) {
226  ADD32;
227  ADVANCE(32);
228  }
229  if (mlen >= 16) {
230  ADD16;
231  ADVANCE(16);
232  }
233  if (mlen >= 8) {
234  ADD8;
235  ADVANCE(8);
236  }
237  if (mlen >= 4) {
238  ADD4;
239  ADVANCE(4)
240  }
241  if (mlen == 0)
242  continue;
243 
244  REDUCE;
245  if (mlen >= 2) {
246  ADDSHORT;
247  ADVANCE(2);
248  }
249  if (mlen == 1) {
250  ADDBYTE;
251  }
252  }
253  if (byte_swapped) {
254  REDUCE;
255  ROL;
256  }
257  REDUCE;
258  ADDCARRY;
259 
260  return (0xffff ^ sum);
261 }
262 
263 int
264 in_cksum(struct mbuf *m, int len)
265 {
266 
267  return (in_cksum_internal(m, 0, len, 0));
268 }
269 
270 int
271 in4_cksum(struct mbuf *m, uint8_t nxt, int off, int len)
272 {
273  u_char *w;
274  u_int sum = 0;
275  struct ipovly ipov;
276 
277  /*
278  * Declare two temporary registers for use by the asm code. We
279  * allow the compiler to pick which specific machine registers to
280  * use, instead of hard-coding this in the asm code above.
281  */
282  u_int tmp1, tmp2;
283 
284  if (nxt != 0) {
285  /* pseudo header */
286  memset(&ipov, 0, sizeof(ipov));
287  ipov.ih_len = htons(len);
288  ipov.ih_pr = nxt;
289  ipov.ih_src = mtod(m, struct ip *)->ip_src;
290  ipov.ih_dst = mtod(m, struct ip *)->ip_dst;
291  w = (u_char *)&ipov;
292  /* assumes sizeof(ipov) == 20 */
293  ADD16;
294  w += 16;
295  ADD4;
296  }
297 
298  /* skip unnecessary part */
299  while (m && off > 0) {
300  if (m->m_len > off)
301  break;
302  off -= m->m_len;
303  m = m->m_next;
304  }
305 
306  return (in_cksum_internal(m, off, len, sum));
307 }
308 
Definition: ip.h:61
Definition: ip_var.h:43
Definition: mbuf.h:103