RTEMS CPU Kit with SuperCore  4.11.3
in_cksum.h
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1 /*
2  * Nios II version by Jeffrey O. Hill
3  *
4  * Copyright 2012. Los Alamos National Security, LLC.
5  * The Nios II specific part was produced under U.S. Government contract
6  * DE-AC52-06NA25396 for Los Alamos National Laboratory (LANL),
7  * which is operated by Los Alamos National Security, LLC for
8  * the U.S. Department of Energy. The U.S. Government has rights
9  * to use, reproduce, and distribute this software. NEITHER THE
10  * GOVERNMENT NOR LOS ALAMOS NATIONAL SECURITY, LLC MAKES ANY
11  * WARRANTY, EXPRESS OR IMPLIED, OR ASSUMES ANY LIABILITY FOR
12  * THE USE OF THIS SOFTWARE.
13  *
14  * Copyright (c) 1990 The Regents of the University of California.
15  * All rights reserved.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  * notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  * notice, this list of conditions and the following disclaimer in the
24  * documentation and/or other materials provided with the distribution.
25  * 3. All advertising materials mentioning features or use of this software
26  * must display the following acknowledgement:
27  * This product includes software developed by the University of
28  * California, Berkeley and its contributors.
29  * 4. Neither the name of the University nor the names of its contributors
30  * may be used to endorse or promote products derived from this software
31  * without specific prior written permission.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
34  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
35  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
36  * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
37  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
38  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
39  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
41  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
42  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
43  * SUCH DAMAGE.
44  *
45  * from tahoe: in_cksum.c 1.2 86/01/05
46  * from: @(#)in_cksum.c 1.3 (Berkeley) 1/19/91
47  * from: Id: in_cksum.c,v 1.8 1995/12/03 18:35:19 bde Exp
48  */
49 
50 #ifndef _MACHINE_IN_CKSUM_H_
51 #define _MACHINE_IN_CKSUM_H_ 1
52 
53 #include <sys/cdefs.h>
54 #include <netinet/ip.h> /* struct ip */
55 
56 /*
57  * It it useful to have an Internet checksum routine which is inlineable
58  * and optimized specifically for the task of computing IP header checksums
59  * in the normal case (where there are no options and the header length is
60  * therefore always exactly five 32-bit words.
61  */
62 
63 /*
64  * Optimized version for the i386 family
65  */
66 
67 #if (defined(__GNUC__) && defined(__i386__))
68 
69 static __inline u_int
70 in_cksum_hdr(const struct ip *ip)
71 {
72  register u_int sum = ((const uint32_t*)ip)[0];
73  register u_int tmp;
74 
75  __asm__ __volatile__(
76  " addl %2, %0 \n"
77  " adcl %3, %0 \n"
78  " adcl %4, %0 \n"
79  " adcl %5, %0 \n"
80  " adcl $0, %0 \n"
81  " movl %0, %1 \n"
82  " roll $16, %0 \n"
83  " addl %1, %0 \n"
84  :"+&r"(sum),"=&r"(tmp)
85  :"g"(((const uint32_t*)ip)[1]),
86  "g"(((const uint32_t*)ip)[2]),
87  "g"(((const uint32_t*)ip)[3]),
88  "g"(((const uint32_t*)ip)[4]),
89  "m"(*ip)
90  :"cc"
91  );
92 
93  return (~sum) >>16;
94 }
95 
96 static __inline void
97 in_cksum_update(struct ip *ip)
98 {
99  int __tmpsum;
100  __tmpsum = (int)ntohs(ip->ip_sum) + 256;
101  ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16));
102 }
103 
104 /*
105  * Optimized version for the MC68xxx and Coldfire families
106  */
107 
108 #elif (defined(__GNUC__) && (defined(__mc68000__) || defined(__m68k__)))
109 
110 static __inline__ u_int
111 in_cksum_hdr(const struct ip *ip)
112 {
113  register u_int *ap = (u_int *)ip;
114  register u_int sum = *ap++;
115  register u_int tmp;
116 
117  __asm__ __volatile__("addl %2@+,%0\n\t"
118  "movel %2@+,%1\n\t"
119  "addxl %1,%0\n\t"
120  "movel %2@+,%1\n\t"
121  "addxl %1,%0\n\t"
122  "movel %2@,%1\n\t"
123  "addxl %1,%0\n\t"
124  "moveq #0,%1\n\t"
125  "addxl %1,%0\n" :
126  "=d" (sum), "=d" (tmp), "=a" (ap) :
127  "0" (sum), "2" (ap), "m"(*ip));
128  sum = (sum & 0xffff) + (sum >> 16);
129  if (sum > 0xffff)
130  sum -= 0xffff;
131  return ~sum & 0xffff;
132 }
133 
134 /*
135  * Optimized version for the PowerPC family
136  */
137 
138 #elif (defined(__GNUC__) && (defined(__PPC__) || defined(__ppc__)))
139 
140 static __inline u_int
141 in_cksum_hdr(const struct ip *ip)
142 {
143 register u_int sum, tmp;
144  __asm__ __volatile__(
145  " lwz %0, 0(%2) \n"
146  " lwz %1, 4(%2) \n"
147  " addc %0, %0, %1 \n" /* generate carry (XER[CA]) */
148  " lwz %1, 8(%2) \n"
149  " adde %0, %0, %1 \n" /* add + generate */
150  " lwz %1, 12(%2) \n"
151  " adde %0, %0, %1 \n"
152  " lwz %1, 16(%2) \n"
153  " adde %0, %0, %1 \n"
154  " addze %0, %0 \n" /* mop up XER[CA] */
155  " rotlwi %1, %0,16 \n" /* word-swapped copy in %1 */
156  " add %0, %0, %1 \n" /* see comment below */
157  " not %0, %0 \n"
158  " srwi %0, %0, 16 \n"
159  :"=&r"(sum),"=&r"(tmp):"b"(ip), "m"(*ip):"xer"
160  );
161  /* Note: if 'add' generates a carry out of the lower 16 bits
162  * then this is automatically added to the upper 16 bits
163  * where the correct result is found. (Stolen from linux.)
164  * %0 : upper-word lower-word
165  * + %1 : lower-word upper-word
166  * = word-sum word-sum
167  * ^+inter-word-carry
168  */
169  return sum;
170 }
171 
172 static __inline void
173 in_cksum_update(struct ip *ip)
174 {
175  int __tmpsum;
176  __tmpsum = (int)ntohs(ip->ip_sum) + 256;
177  ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16));
178 }
179 
180 /*
181  * SPARC Version
182  */
183 
184 #elif (defined(__GNUC__) && defined(__sparc__))
185 
186 static __inline u_int
187 in_cksum_hdr(const struct ip *ip)
188 {
189  register u_int sum = 0;
190  register u_int tmp_o2;
191  register u_int tmp_o3;
192 
193  __asm__ __volatile__ (" \
194  ld [%0], %1 ; \
195  ld [%0+4], %2 ; \
196  ld [%0+8], %3 ; \
197  addcc %1, %2, %1 ; \
198  ld [%0+12], %2 ; \
199  addxcc %1, %3, %1 ; \
200  ld [%0+16], %3 ; \
201  addxcc %1, %2, %1 ; \
202  addxcc %1, %3, %1 ; \
203  set 0x0ffff, %3 ; \
204  srl %1, 16, %2 ; \
205  and %1, %3, %1 ; \
206  addx %1, %2, %1 ; \
207  srl %1, 16, %2 ; \
208  add %1, %2, %1 ; \
209  not %1 ; \
210  and %1, %3, %1 ; \
211  " : "=r" (ip), "=r" (sum), "=r" (tmp_o2), "=r" (tmp_o3)
212  : "0" (ip), "1" (sum), "m"(*ip)
213  );
214  return sum;
215 }
216 
217 #define in_cksum_update(ip) \
218  do { \
219  int __tmpsum; \
220  __tmpsum = (int)ntohs(ip->ip_sum) + 256; \
221  ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16)); \
222  } while(0)
223 
224 /*
225  * Optimized version for the Altera Nios II softcore
226  */
227 #elif defined ( __GNUC__ ) && defined ( __nios2__ )
228 
229 static inline uint32_t _NIOS2_Add_ones_complement ( const uint32_t a,
230  const uint32_t b )
231 {
232  uint32_t sum;
233  uint32_t C;
234  __asm__ __volatile__ (
235  " add %0, %2, %3 \n" /* sum <= a + b */
236  " cmpltu %1, %0, %2 \n" /* C <= carryBit32 */
237  " add %0, %1, %0 \n" /* sum <= sum + C */
238  : "=&r"(sum), "=&r"(C)
239  : "r"(a), "r"(b)
240  );
241  return sum;
242 }
243 
244 static inline uint16_t _NIOS2_Add_ones_complement_word_halves
245  ( const uint32_t a )
246 {
247  uint16_t sum;
248  uint32_t tmp;
249  __asm__ __volatile__ (
250  " roli %1, %2, 16 \n" /* tmp <= a rotate left 16 */
251  " add %1, %2, %1 \n" /* tmp <= a + tmp + carryBit16 */
252  " srli %0, %1, 16 \n" /* sum <= tmp shift right 16 */
253  : "=&r"(sum),"=&r"(tmp)
254  : "r"(a)
255  );
256  return sum;
257 }
258 
259 static __inline u_int in_cksum_hdr ( const struct ip * pHdrIP )
260 {
261  const uint32_t * const pWd = ( const uint32_t * ) pHdrIP;
262  uint32_t sum = pWd[0];
263  sum = _NIOS2_Add_ones_complement ( sum, pWd[1] );
264  sum = _NIOS2_Add_ones_complement ( sum, pWd[2] );
265  sum = _NIOS2_Add_ones_complement ( sum, pWd[3] );
266  sum = _NIOS2_Add_ones_complement ( sum, pWd[4] );
267  sum = _NIOS2_Add_ones_complement_word_halves ( sum );
268  sum ^= 0xffff;
269  return sum;
270 }
271 
272 static __inline void in_cksum_update ( struct ip * pHdrIP )
273 {
274  uint32_t __tmpsum = ntohs ( pHdrIP->ip_sum );
275  __tmpsum += 256u;
276  __tmpsum += __tmpsum >> 16u;
277  pHdrIP->ip_sum = htons ( ( uint16_t ) __tmpsum );
278 }
279 
280 /*
281  * Here is the generic, portable, inefficient algorithm.
282  */
283 
284 #else
285 u_int in_cksum_hdr(const struct ip *);
286 #define in_cksum_update(ip) \
287  do { \
288  int __tmpsum; \
289  __tmpsum = (int)ntohs(ip->ip_sum) + 256; \
290  ip->ip_sum = htons(__tmpsum + (__tmpsum >> 16)); \
291  } while(0)
292 
293 #endif
294 
295 #endif /* _MACHINE_IN_CKSUM_H_ */
register struct Per_CPU_Control *_SPARC_Per_CPU_current __asm__("g6")
The pointer to the current per-CPU control is available via register g6.