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#define | PRR _SFR_IO8(0x00) |
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#define | PRADC 0 |
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#define | PRUSI 1 |
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#define | PRTIM0 2 |
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#define | PRTIM1 3 |
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#define | DIDR0 _SFR_IO8(0x01) |
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#define | ADC0D 0 |
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#define | ADC1D 1 |
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#define | ADC2D 2 |
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#define | ADC3D 3 |
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#define | AIN0D 4 |
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#define | AIN1D 5 |
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#define | ADCSRB _SFR_IO8(0x03) |
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#define | ADTS0 0 |
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#define | ADTS1 1 |
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#define | ADTS2 2 |
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#define | ADLAR 4 |
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#define | ACME 6 |
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#define | ADC _SFR_IO16(0x04) |
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#define | ADCL _SFR_IO8(0x04) |
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#define | ADCL0 0 |
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#define | ADCL1 1 |
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#define | ADCL2 2 |
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#define | ADCL3 3 |
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#define | ADCL4 4 |
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#define | ADCL5 5 |
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#define | ADCL6 6 |
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#define | ADCL7 7 |
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#define | ADCH _SFR_IO8(0x05) |
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#define | ADCH0 0 |
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#define | ADCH1 1 |
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#define | ADCH2 2 |
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#define | ADCH3 3 |
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#define | ADCH4 4 |
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#define | ADCH5 5 |
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#define | ADCH6 6 |
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#define | ADCH7 7 |
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#define | ADCSRA _SFR_IO8(0x06) |
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#define | ADPS0 0 |
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#define | ADPS1 1 |
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#define | ADPS2 2 |
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#define | ADIE 3 |
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#define | ADIF 4 |
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#define | ADATE 5 |
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#define | ADSC 6 |
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#define | ADEN 7 |
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#define | ADMUX _SFR_IO8(0x07) |
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#define | MUX0 0 |
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#define | MUX1 1 |
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#define | MUX2 2 |
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#define | REFS0 6 |
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#define | ACSR _SFR_IO8(0x08) |
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#define | ACIS0 0 |
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#define | ACIS1 1 |
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#define | ACIE 3 |
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#define | ACI 4 |
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#define | ACO 5 |
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#define | ACBG 6 |
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#define | ACD 7 |
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#define | TIFR1 _SFR_IO8(0x0B) |
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#define | TOV1 0 |
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#define | OCF1A 1 |
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#define | OCF1B 2 |
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#define | TIMSK1 _SFR_IO8(0x0C) |
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#define | TOIE1 0 |
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#define | OCIE1A 1 |
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#define | OCIE1B 2 |
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#define | USICR _SFR_IO8(0x0D) |
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#define | USITC 0 |
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#define | USICLK 1 |
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#define | USICS0 2 |
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#define | USICS1 3 |
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#define | USIWM0 4 |
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#define | USIWM1 5 |
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#define | USIOIE 6 |
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#define | USISIE 7 |
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#define | USISR _SFR_IO8(0x0E) |
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#define | USICNT0 0 |
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#define | USICNT1 1 |
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#define | USICNT2 2 |
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#define | USICNT3 3 |
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#define | USIDC 4 |
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#define | USIPF 5 |
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#define | USIOIF 6 |
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#define | USISIF 7 |
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#define | USIDR _SFR_IO8(0x0F) |
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#define | USIDR0 0 |
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#define | USIDR1 1 |
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#define | USIDR2 2 |
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#define | USIDR3 3 |
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#define | USIDR4 4 |
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#define | USIDR5 5 |
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#define | USIDR6 6 |
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#define | USIDR7 7 |
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#define | USIBR _SFR_IO8(0x10) |
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#define | USIBR0 0 |
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#define | USIBR1 1 |
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#define | USIBR2 2 |
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#define | USIBR3 3 |
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#define | USIBR4 4 |
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#define | USIBR5 5 |
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#define | USIBR6 6 |
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#define | USIBR7 7 |
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#define | PCMSK0 _SFR_IO8(0x12) |
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#define | PCINT0 0 |
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#define | PCINT1 1 |
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#define | PCINT2 2 |
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#define | PCINT3 3 |
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#define | PCINT4 4 |
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#define | PCINT5 5 |
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#define | PCINT6 6 |
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#define | PCINT7 7 |
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#define | GPIOR0 _SFR_IO8(0x13) |
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#define | GPIOR00 0 |
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#define | GPIOR01 1 |
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#define | GPIOR02 2 |
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#define | GPIOR03 3 |
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#define | GPIOR04 4 |
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#define | GPIOR05 5 |
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#define | GPIOR06 6 |
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#define | GPIOR07 7 |
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#define | GPIOR1 _SFR_IO8(0x14) |
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#define | GPIOR10 0 |
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#define | GPIOR11 1 |
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#define | GPIOR12 2 |
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#define | GPIOR13 3 |
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#define | GPIOR14 4 |
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#define | GPIOR15 5 |
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#define | GPIOR16 6 |
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#define | GPIOR17 7 |
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#define | GPIOR2 _SFR_IO8(0x15) |
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#define | GPIOR20 0 |
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#define | GPIOR21 1 |
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#define | GPIOR22 2 |
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#define | GPIOR23 3 |
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#define | GPIOR24 4 |
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#define | GPIOR25 5 |
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#define | GPIOR26 6 |
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#define | GPIOR27 7 |
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#define | PINB _SFR_IO8(0x16) |
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#define | PINB0 0 |
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#define | PINB1 1 |
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#define | PINB2 2 |
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#define | PINB3 3 |
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#define | PINB4 4 |
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#define | PINB5 5 |
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#define | PINB6 6 |
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#define | PINB7 7 |
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#define | DDRB _SFR_IO8(0x17) |
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#define | DDB0 0 |
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#define | DDB1 1 |
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#define | DDB2 2 |
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#define | DDB3 3 |
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#define | DDB4 4 |
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#define | DDB5 5 |
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#define | DDB6 6 |
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#define | DDB7 7 |
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#define | PORTB _SFR_IO8(0x18) |
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#define | PORTB0 0 |
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#define | PORTB1 1 |
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#define | PORTB2 2 |
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#define | PORTB3 3 |
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#define | PORTB4 4 |
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#define | PORTB5 5 |
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#define | PORTB6 6 |
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#define | PORTB7 7 |
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#define | PINA _SFR_IO8(0x19) |
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#define | PINA0 0 |
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#define | PINA1 1 |
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#define | PINA2 2 |
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#define | PINA3 3 |
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#define | PINA4 4 |
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#define | PINA5 5 |
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#define | PINA6 6 |
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#define | PINA7 7 |
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#define | DDRA _SFR_IO8(0x1A) |
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#define | DDA0 0 |
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#define | DDA1 1 |
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#define | DDA2 2 |
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#define | DDA3 3 |
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#define | DDA4 4 |
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#define | DDA5 5 |
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#define | DDA6 6 |
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#define | DDA7 7 |
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#define | PORTA _SFR_IO8(0x1B) |
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#define | PORTA0 0 |
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#define | PORTA1 1 |
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#define | PORTA2 2 |
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#define | PORTA3 3 |
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#define | PORTA4 4 |
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#define | PORTA5 5 |
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#define | PORTA6 6 |
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#define | PORTA7 7 |
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#define | EECR _SFR_IO8(0x1C) |
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#define | EERE 0 |
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#define | EEPE 1 |
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#define | EEMPE 2 |
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#define | EERIE 3 |
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#define | EEPM0 4 |
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#define | EEPM1 5 |
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#define | EEDR _SFR_IO8(0x1D) |
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#define | EEARL _SFR_IO8(0x1E) |
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#define | PCMSK1 _SFR_IO8(0x20) |
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#define | PCINT8 0 |
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#define | PCINT9 1 |
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#define | PCINT10 2 |
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#define | PCINT11 3 |
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#define | WDTCSR _SFR_IO8(0x21) |
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#define | WDP0 0 |
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#define | WDP1 1 |
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#define | WDP2 2 |
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#define | WDE 3 |
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#define | WDCE 4 |
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#define | WDP3 5 |
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#define | WDIE 6 |
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#define | WDIF 7 |
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#define | GTCCR _SFR_IO8(0x23) |
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#define | PSR10 0 |
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#define | TSM 7 |
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#define | CLKPR _SFR_IO8(0x26) |
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#define | CLKPS0 0 |
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#define | CLKPS1 1 |
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#define | CLKPS2 2 |
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#define | CLKPS3 3 |
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#define | CLKPCE 7 |
| |
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#define | OCR1B _SFR_IO8(0x2B) |
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#define | OCR1B_0 0 |
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#define | OCR1B_1 1 |
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#define | OCR1B_2 2 |
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#define | OCR1B_3 3 |
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#define | OCR1B_4 4 |
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#define | OCR1B_5 5 |
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#define | OCR1B_6 6 |
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#define | OCR1B_7 7 |
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#define | OCR1A _SFR_IO8(0x2C) |
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#define | OCR1A_0 0 |
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#define | OCR1A_1 1 |
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#define | OCRA1_2 2 |
| |
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#define | OCRA1_3 3 |
| |
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#define | OCRA1_4 4 |
| |
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#define | OCRA1_5 5 |
| |
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#define | OCRA1_6 6 |
| |
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#define | OCRA1_7 7 |
| |
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#define | TCNT1 _SFR_IO8(0x2D) |
| |
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#define | TCNT1_0 0 |
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#define | TCNT1_1 1 |
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#define | TCNT1_2 2 |
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#define | TCNT1_3 3 |
| |
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#define | TCNT1_4 4 |
| |
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#define | TCNT1_5 5 |
| |
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#define | TCNT1_6 6 |
| |
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#define | TCNT1_7 7 |
| |
|
#define | TCCR1B _SFR_IO8(0x2E) |
| |
|
#define | CS10 0 |
| |
|
#define | CS11 1 |
| |
|
#define | CS12 2 |
| |
|
#define | WGM12 3 |
| |
|
#define | FOC1B 6 |
| |
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#define | FOC1A 7 |
| |
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#define | TCCR1A _SFR_IO8(0x2F) |
| |
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#define | WGM10 0 |
| |
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#define | WGM11 1 |
| |
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#define | COM1B0 4 |
| |
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#define | COM1B1 5 |
| |
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#define | COM1A0 6 |
| |
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#define | COM1A1 7 |
| |
|
#define | TCCR0A _SFR_IO8(0x30) |
| |
|
#define | WGM00 0 |
| |
|
#define | WGM01 1 |
| |
|
#define | COM0B0 4 |
| |
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#define | COM0B1 5 |
| |
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#define | COM0A0 6 |
| |
|
#define | COM0A1 7 |
| |
|
#define | OSCCAL _SFR_IO8(0x31) |
| |
|
#define | CAL0 0 |
| |
|
#define | CAL1 1 |
| |
|
#define | CAL2 2 |
| |
|
#define | CAL3 3 |
| |
|
#define | CAL4 4 |
| |
|
#define | CAL5 5 |
| |
|
#define | CAL6 6 |
| |
|
#define | CAL7 7 |
| |
|
#define | TCNT0 _SFR_IO8(0x32) |
| |
|
#define | TCNT0_0 0 |
| |
|
#define | TCNT0_1 1 |
| |
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#define | TCNT0_2 2 |
| |
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#define | TCNT0_3 3 |
| |
|
#define | TCNT0_4 4 |
| |
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#define | TCNT0_5 5 |
| |
|
#define | TCNT0_6 6 |
| |
|
#define | TCNT0_7 7 |
| |
|
#define | TCCR0B _SFR_IO8(0x33) |
| |
|
#define | CS00 0 |
| |
|
#define | CS01 1 |
| |
|
#define | CS02 2 |
| |
|
#define | WGM02 3 |
| |
|
#define | FOC0B 6 |
| |
|
#define | FOC0A 7 |
| |
|
#define | MCUSR _SFR_IO8(0x34) |
| |
|
#define | PORF 0 |
| |
|
#define | EXTRF 1 |
| |
|
#define | BORF 2 |
| |
|
#define | WDRF 3 |
| |
|
#define | MCUCR _SFR_IO8(0x35) |
| |
|
#define | ISC00 0 |
| |
|
#define | ISC01 1 |
| |
|
#define | BODSE 2 |
| |
|
#define | SM0 3 |
| |
|
#define | SM1 4 |
| |
|
#define | SE 5 |
| |
|
#define | PUD 6 |
| |
|
#define | BODS 7 |
| |
|
#define | OCR0A _SFR_IO8(0x36) |
| |
|
#define | OCR0A_0 0 |
| |
|
#define | OCR0A_1 1 |
| |
|
#define | OCR0A_2 2 |
| |
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#define | OCR0A_3 3 |
| |
|
#define | OCR0A_4 4 |
| |
|
#define | OCR0A_5 5 |
| |
|
#define | OCR0A_6 6 |
| |
|
#define | OCR0A_7 7 |
| |
|
#define | SPMCSR _SFR_IO8(0x37) |
| |
|
#define | SPMEN 0 |
| |
|
#define | PGERS 1 |
| |
|
#define | PGWRT 2 |
| |
|
#define | RFLB 3 |
| |
|
#define | CTPB 4 |
| |
|
#define | TIFR0 _SFR_IO8(0x38) |
| |
|
#define | TOV0 0 |
| |
|
#define | OCF0A 1 |
| |
|
#define | OCF0B 2 |
| |
|
#define | TIMSK0 _SFR_IO8(0x39) |
| |
|
#define | TOIE0 0 |
| |
|
#define | OCIE0A 1 |
| |
|
#define | OCIE0B 2 |
| |
|
#define | GIFR _SFR_IO8(0x3A) |
| |
|
#define | PCIF0 4 |
| |
|
#define | PCIF1 5 |
| |
|
#define | INTF0 6 |
| |
|
#define | GIMSK _SFR_IO8(0x3B) |
| |
|
#define | PCIE0 4 |
| |
|
#define | PCIE1 5 |
| |
|
#define | INT0 6 |
| |
|
#define | OCR0B _SFR_IO8(0x3C) |
| |
|
#define | OCR0B_0 0 |
| |
|
#define | OCR0B_1 1 |
| |
|
#define | OCR0B_2 2 |
| |
|
#define | OCR0B_3 3 |
| |
|
#define | OCR0B_4 4 |
| |
|
#define | OCR0B_5 5 |
| |
|
#define | OCR0B_6 6 |
| |
|
#define | OCR0B_7 7 |
| |
|
#define | INT0_vect _VECTOR(1) |
| |
|
#define | PCINT0_vect _VECTOR(2) |
| |
|
#define | PCINT1_vect _VECTOR(3) |
| |
|
#define | WDT_vect _VECTOR(4) |
| |
|
#define | TIM1_COMPA_vect _VECTOR(5) |
| |
|
#define | TIM1_COMPB_vect _VECTOR(6) |
| |
|
#define | TIM1_OVF_vect _VECTOR(7) |
| |
|
#define | TIM0_COMPA_vect _VECTOR(8) |
| |
|
#define | TIM0_COMPB_vect _VECTOR(9) |
| |
|
#define | TIM0_OVF_vect _VECTOR(10) |
| |
|
#define | ANA_COMP_vect _VECTOR(11) |
| |
|
#define | ADC_vect _VECTOR(12) |
| |
|
#define | EE_RDY_vect _VECTOR(13) |
| |
|
#define | USI_START_vect _VECTOR(14) |
| |
|
#define | USI_OVF_vect _VECTOR(15) |
| |
|
#define | _VECTORS_SIZE 32 |
| |
|
#define | SPM_PAGESIZE 64 |
| |
|
#define | RAMEND 0x15F |
| |
|
#define | XRAMEND RAMEND |
| |
|
#define | E2END 0x3F |
| |
|
#define | E2PAGESIZE 4 |
| |
|
#define | FLASHEND 0xFFF |
| |
|
#define | FUSE_MEMORY_SIZE 3 |
| |
|
#define | FUSE_CKSEL0 (unsigned char)~_BV(0) |
| |
|
#define | FUSE_CKSEL1 (unsigned char)~_BV(1) |
| |
|
#define | FUSE_CKSEL2 (unsigned char)~_BV(2) |
| |
|
#define | FUSE_CKSEL3 (unsigned char)~_BV(3) |
| |
|
#define | FUSE_SUT0 (unsigned char)~_BV(4) |
| |
|
#define | FUSE_SUT1 (unsigned char)~_BV(5) |
| |
|
#define | FUSE_CKOUT (unsigned char)~_BV(6) |
| |
|
#define | FUSE_CKDIV8 (unsigned char)~_BV(7) |
| |
|
#define | LFUSE_DEFAULT (FUSE_CKSEL0 & FUSE_CKSEL2 & FUSE_CKSEL3 & FUSE_SUT0 & FUSE_CKDIV8) |
| |
|
#define | FUSE_BODLEVEL0 (unsigned char)~_BV(0) |
| |
|
#define | FUSE_BODLEVEL1 (unsigned char)~_BV(1) |
| |
|
#define | FUSE_BODLEVEL2 (unsigned char)~_BV(2) |
| |
|
#define | FUSE_EESAVE (unsigned char)~_BV(3) |
| |
|
#define | FUSE_WDTON (unsigned char)~_BV(4) |
| |
|
#define | FUSE_SPIEN (unsigned char)~_BV(5) |
| |
|
#define | FUSE_DWEN (unsigned char)~_BV(6) |
| |
|
#define | FUSE_RSTDISBL (unsigned char)~_BV(7) |
| |
|
#define | HFUSE_DEFAULT (FUSE_SPIEN) |
| |
|
#define | FUSE_SELFPRGEN (unsigned char)~_BV(0) |
| |
|
#define | EFUSE_DEFAULT (0xFF) |
| |
|
#define | __LOCK_BITS_EXIST |
| |
|
#define | SIGNATURE_0 0x1E |
| |
|
#define | SIGNATURE_1 0x92 |
| |
|
#define | SIGNATURE_2 0x0C |
| |
