RTEMS BSP and Driver Guide (5.3).¶
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1. Introduction¶
This document describes how to create or modify a Board Support Package (BSP) for RTEMS, i.e. how to port RTEMS on a new microcontroller, system on chip (SoC) or board. It is strongly recommended to notify the RTEMS development mailing about any activity in this area and maybe also add tickets for specific work packages.
A basic BSP consists of the following components:
Low-level initialization
Console driver
Clock driver
2. Target Dependent Files¶
Warning
This chapter contains outdated and confusing information.
RTEMS has a multi-layered approach to portability. This is done to maximize the amount of software that can be reused. Much of the RTEMS source code can be reused on all RTEMS platforms. Other parts of the executive are specific to hardware in some sense. RTEMS classifies target dependent code based upon its dependencies into one of the following categories.
CPU dependent
Board dependent
Peripheral dependent
2.1. CPU Dependent¶
This class of code includes the foundation routines for the executive proper such as the context switch and the interrupt subroutine implementations. Sources for the supported processor families can be found in cpukit/score/cpu
. A good starting point for a new family of processors is the no_cpu
directory, which holds both prototypes and descriptions of each needed CPU dependent function.
CPU dependent code is further subcategorized if the implementation is dependent on a particular CPU model. For example, the MC68000 and MC68020 processors are both members of the m68k CPU family but there are significant differences between these CPU models which RTEMS must take into account.
The source code found in the cpukit/score/cpu
is required to only depend upon the CPU model variations that GCC distinguishes for the purposes of multilib’ing. Multilib is the term the GNU community uses to refer to building a single library source multiple times with different compiler options so the binary code generated is compatible. As an example, from GCC’s perspective, many PowerPC CPU models are just a PPC603e. Remember that GCC only cares about the CPU code itself and need not be aware of any peripherals. In the embedded community, we are exposed to thousands of CPU models which are all based upon only a relative small number of CPU cores.
Similarly for the SPARC/ERC32 BSP, the RTEMS_CPU
is specified as erc32
which is the name of the CPU model and BSP for this SPARC V7 system on chip. But the multilib variant used is actually v7
which indicates the ERC32 CPU core is a SPARC V7.
2.2. Board Dependent¶
This class of code provides the most specific glue between RTEMS and a particular board. This code is represented by the Board Support Packages and associated Device Drivers. Sources for the BSPs included in the RTEMS distribution are located in the directory bsps. The BSP source directory is further subdivided based on the CPU family and BSP.
Some BSPs may support multiple board models within a single board family. This is necessary when the board supports multiple variants on a single base board. For example, the Motorola MVME162 board family has a fairly large number of variations based upon the particular CPU model and the peripherals actually placed on the board.
2.3. Peripheral Dependent¶
This class of code provides a reusable library of peripheral device drivers which can be tailored easily to a particular board. The libchip library is a collection of reusable software objects that correspond to standard controllers. Just as the hardware engineer chooses a standard controller when designing a board, the goal of this library is to let the software engineer do the same thing.
The source code for the reusable peripheral driver library may be found in the directory cpukit/dev or bsps/shared/dev. The source code is further divided based upon the class of hardware. Example classes include serial communications controllers, real-time clocks, non-volatile memory, and network controllers.
2.4. Questions to Ask¶
When evaluating what is required to support RTEMS applications on a particular target board, the following questions should be asked:
Does a BSP for this board exist?
Does a BSP for a similar board exists?
Is the board’s CPU supported?
If there is already a BSP for the board, then things may already be ready to start developing application software. All that remains is to verify that the existing BSP provides device drivers for all the peripherals on the board that the application will be using. For example, the application in question may require that the board’s Ethernet controller be used and the existing BSP may not support this.
If the BSP does not exist and the board’s CPU model is supported, then examine the reusable chip library and existing BSPs for a close match. Other BSPs and libchip provide starting points for the development of a new BSP. It is often possible to copy existing components in the reusable chip library or device drivers from BSPs from different CPU families as the starting point for a new device driver. This will help reduce the development effort required.
If the board’s CPU family is supported but the particular CPU model on that board is not, then the RTEMS port to that CPU family will have to be augmented. After this is done, development of the new BSP can proceed.
Otherwise both CPU dependent code and the BSP will have to be written.
This type of development often requires specialized skills and there are people in the community who provide those services. If you need help in making these modifications to RTEMS try a search in a search engine with something like “RTEMS support”. The RTEMS Project encourages users to use support services however we do not endorse any providers.
2.5. CPU Dependent Executive Files¶
The CPU dependent files in the RTEMS executive source code are found in the cpukit/score/cpu/${RTEMS_CPU}
directories. The ${RTEMS_CPU}
is a particular architecture, e.g. arm, powerpc, riscv, sparc, etc.
Within each CPU dependent directory inside the executive proper is a file named cpu.h
which contains information about each of the supported CPU models within that family.
2.6. Board Support Package Structure¶
The BSPs are all under the bsps directory. The structure in this source subtree is:
bsps/shared
bsps/${RTEMS_CPU}/shared
bsps/${RTEMS_CPU}/${RTEMS_BSP_FAMILY}
The ${RTEMS_CPU}
is a particular architecture, e.g. arm, powerpc, riscv, sparc, etc. The shared
directories contain code shared by all BSPs or BSPs of a particular architecture. The ${RTEMS_BSP_FAMILY}
directories contain BSPs for a particular system on chip (SoC) or processor family.
Use the following structure under the bsps/${RTEMS_CPU}/${RTEMS_BSP_FAMILY}
:
ata
- the legacy ATA/IDE driverbtimer
- the legacy benchmark timer drivercache
- cache controller supportclock
- the clock driverconfig
- build system configuration filesconsole
- the console drivercontrib
- imports of external sourcesthe layout of external sources should be used as is if possible
i2c
- the I2C driverinclude
- public header filesirq
- the interrupt controller supportmpci
- support for heterogeneous multiprocessing (RTEMS_MULTIPROCESSING
)net
- legacy network stack driversrtc
- the RTC driverspi
- the SPI driverstart
- everything required to run a minimal application without devicesstart.S
- lowest level startup codebspstart.c
- low level startup codebspsmp.c
- SMP supportlinkcmds
- a linker command file
3. Linker Script¶
Warning
This chapter contains outdated and confusing information.
3.1. What is a “linkcmds” file?¶
The linkcmds
file is a script which is passed to the linker at linking time. This file describes the memory configuration of the board as needed to link the program. Specifically it specifies where the code and data for the application will reside in memory.
The format of the linker script is defined by the GNU Loader ld
which is included as a component of the GNU Binary Utilities. If you are using GNU/Linux, then you probably have the documentation installed already and are using these same tools configured for native use. Please visit the Binutils project http://sourceware.org/binutils/ if you need more information.
3.2. Program Sections¶
An embedded systems programmer must be much more aware of the placement of their executable image in memory than the average applications programmer. A program destined to be embedded as well as the target system have some specific properties that must be taken into account. Embedded machines often mean average performances and small memory usage. It is the memory usage that concerns us when examining the linker command file.
Two types of memories have to be distinguished:
RAM - volatile offering read and write access
ROM - non-volatile but read only
Even though RAM and ROM can be found in every personal computer, one generally doesn’t care about them. In a personal computer, a program is nearly always stored on disk and executed in RAM. Things are a bit different for embedded targets: the target will execute the program each time it is rebooted or switched on. The application program is stored in non-volatile memory such as ROM, PROM, EEPROM, or Flash. On the other hand, data processing occurs in RAM.
This leads us to the structure of an embedded program. In rough terms, an embedded program is made of sections. It is the responsibility of the application programmer to place these sections in the appropriate place in target memory. To make this clearer, if using the COFF object file format on the Motorola m68k family of microprocessors, the following sections will be present:
code (
.text
) section: is the program’s code and it should not be modified. This section may be placed in ROM.non-initialized data (
.bss
) section: holds uninitialized variables of the program. It can stay in RAM.initialized data (
.data
) section: holds the initialized program data which may be modified during the program’s life. This means they have to be in RAM. On the other hand, these variables must be set to predefined values, and those predefined values have to be stored in ROM.
Note
Many programs and support libraries unknowingly assume that the .bss
section and, possibly, the application heap are initialized to zero at program start. This is not required by the ISO/ANSI C Standard but is such a common requirement that most BSPs do this.
That brings us up to the notion of the image of an executable: it consists of the set of the sections that together constitute the application.
3.3. Image of an Executable¶
As a program executable has many sections (note that the user can define their own, and that compilers define theirs without any notice), one has to specify the placement of each section as well as the type of memory (RAM or ROM) the sections will be placed into. For instance, a program compiled for a Personal Computer will see all the sections to go to RAM, while a program destined to be embedded will see some of his sections going into the ROM.
The connection between a section and where that section is loaded into memory is made at link time. One has to let the linker know where the different sections are to be placed once they are in memory.
The following example shows a simple layout of program sections. With some object formats, there are many more sections but the basic layout is conceptually similar.
.text | RAM or ROM |
.data | RAM |
.bss | RAM |
3.4. Example Linker Command Script¶
The GNU linker has a command language to specify the image format. This command language can be quite complicated but most of what is required can be learned by careful examination of a well-documented example. The following is a heavily commented version of the linker script used with the the gen68340
BSP This file can be found at $BSP340_ROOT/startup/linkcmds.
/*
* Specify that the output is to be coff-m68k regardless of what the
* native object format is.
*/
OUTPUT_FORMAT(coff-m68k)
/*
* Set the amount of RAM on the target board.
*
* NOTE: The default may be overridden by passing an argument to ld.
*/
RamSize = DEFINED(RamSize) ? RamSize : 4M;
/*
* Set the amount of RAM to be used for the application heap. Objects
* allocated using malloc() come from this area. Having a tight heap
* size is somewhat difficult and multiple attempts to squeeze it may
* be needed reducing memory usage is important. If all objects are
* allocated from the heap at system initialization time, this eases
* the sizing of the application heap.
*
* NOTE 1: The default may be overridden by passing an argument to ld.
*
* NOTE 2: The TCP/IP stack requires additional memory in the Heap.
*
* NOTE 3: The GNAT/RTEMS run-time requires additional memory in
* the Heap.
*/
HeapSize = DEFINED(HeapSize) ? HeapSize : 0x10000;
/*
* Set the size of the starting stack used during BSP initialization
* until first task switch. After that point, task stacks allocated
* by RTEMS are used.
*
* NOTE: The default may be overridden by passing an argument to ld.
*/
StackSize = DEFINED(StackSize) ? StackSize : 0x1000;
/*
* Starting addresses and length of RAM and ROM.
*
* The addresses must be valid addresses on the board. The
* Chip Selects should be initialized such that the code addresses
* are valid.
*/
MEMORY {
ram : ORIGIN = 0x10000000, LENGTH = 4M
rom : ORIGIN = 0x01000000, LENGTH = 4M
}
/*
* This is for the network driver. See the Networking documentation
* for more details.
*/
ETHERNET_ADDRESS =
DEFINED(ETHERNET_ADDRESS) ? ETHERNET_ADDRESS : 0xDEAD12;
/*
* The following defines the order in which the sections should go.
* It also defines a number of variables which can be used by the
* application program.
*
* NOTE: Each variable appears with 1 or 2 leading underscores to
* ensure that the variable is accessible from C code with a
* single underscore. Some object formats automatically add
* a leading underscore to all C global symbols.
*/
SECTIONS {
/*
* Make the RomBase variable available to the application.
*/
_RamSize = RamSize;
__RamSize = RamSize;
/*
* Boot PROM - Set the RomBase variable to the start of the ROM.
*/
rom : {
_RomBase = .;
__RomBase = .;
} >rom
/*
* Dynamic RAM - set the RamBase variable to the start of the RAM.
*/
ram : {
_RamBase = .;
__RamBase = .;
} >ram
/*
* Text (code) goes into ROM
*/
.text : {
/*
* Create a symbol for each object (.o).
*/
CREATE_OBJECT_SYMBOLS
/*
* Put all the object files code sections here.
*/
*(.text)
. = ALIGN (16); /* go to a 16-byte boundary */
/*
* C++ constructors and destructors
*
* NOTE: See the CROSSGCC mailing-list FAQ for
* more details about the "\[......]".
*/
__CTOR_LIST__ = .;
[......]
__DTOR_END__ = .;
/*
* Declares where the .text section ends.
*/
etext = .;
_etext = .;
} >rom
/*
* Exception Handler Frame section
*/
.eh_fram : {
. = ALIGN (16);
*(.eh_fram)
} >ram
/*
* GCC Exception section
*/