RTEMS 4.9.6 On-Line Library

Port Specific Information Vectoring of an Interrupt Handler

RTEMS CPU Architecture Supplement

1.4.1: Vectoring of an Interrupt Handler

In each of the architecture specific chapters, this subsection will describe the architecture specific details of the interrupt vectoring process. In particular, it should include a description of the Interrupt Stack Frame (ISF).

RTEMS CPU Architecture Supplement